[POWERPC] 85xx: Only invalidate TLB0 and TLB1
All current 85xx/e500 implementations only have two TLB arrays. We are wasting cycles by invalidating TLB2 and TLB3. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@@ -275,12 +275,6 @@ _GLOBAL(_tlbia)
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/* Invalidate all entries in TLB1 */
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/* Invalidate all entries in TLB1 */
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li r3, 0x0c
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li r3, 0x0c
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tlbivax 0,3
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tlbivax 0,3
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/* Invalidate all entries in TLB2 */
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li r3, 0x14
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tlbivax 0,3
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/* Invalidate all entries in TLB3 */
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li r3, 0x1c
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tlbivax 0,3
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msync
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msync
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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tlbsync
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tlbsync
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@@ -375,12 +369,8 @@ _GLOBAL(_tlbie)
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#elif defined(CONFIG_FSL_BOOKE)
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#elif defined(CONFIG_FSL_BOOKE)
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rlwinm r4, r3, 0, 0, 19
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rlwinm r4, r3, 0, 0, 19
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ori r5, r4, 0x08 /* TLBSEL = 1 */
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ori r5, r4, 0x08 /* TLBSEL = 1 */
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ori r6, r4, 0x10 /* TLBSEL = 2 */
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ori r7, r4, 0x18 /* TLBSEL = 3 */
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tlbivax 0, r4
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tlbivax 0, r4
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tlbivax 0, r5
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tlbivax 0, r5
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tlbivax 0, r6
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tlbivax 0, r7
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msync
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msync
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#if defined(CONFIG_SMP)
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#if defined(CONFIG_SMP)
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tlbsync
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tlbsync
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