Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits) [ARM] 3541/2: workaround for PXA27x erratum E7 [ARM] nommu: provide a way for correct control register value selection [ARM] 3705/1: add supersection support to ioremap() [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency [ARM] 3703/1: Add help description for ARCH_EP80219 [ARM] 3678/1: MMC: Make OMAP MMC work [ARM] 3677/1: OMAP: Update H2 defconfig [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1 [ARM] Add section support to ioremap [ARM] Fix sa11x0 SDRAM selection [ARM] Set bit 4 on section mappings correctly depending on CPU [ARM] 3666/1: TRIZEPS4 [1/5] core ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE ARM: OMAP: Update dmtimers ARM: OMAP: Make clock variables static ARM: OMAP: Fix GPMC compilation when DEBUG is defined ARM: OMAP: Mux updates for external DMA and GPIO ...
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@ -447,8 +447,11 @@ __common_mmu_cache_on:
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mov r1, #-1
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mcr p15, 0, r3, c2, c0, 0 @ load page table pointer
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mcr p15, 0, r1, c3, c0, 0 @ load domain access control
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mcr p15, 0, r0, c1, c0, 0 @ load control register
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mov pc, lr
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b 1f
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.align 5 @ cache line aligned
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1: mcr p15, 0, r0, c1, c0, 0 @ load control register
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mrc p15, 0, r0, c1, c0, 0 @ and read it back to
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sub pc, lr, r0, lsr #32 @ properly flush pipeline
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/*
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* All code following this line is relocatable. It is relocated by
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