Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: IB/ehca: Fix lock flag variable location, bump version number IB/ehca: Serialize HCA-related hCalls if necessary IB/ehca: Return correct number of SGEs for SRQ
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@@ -322,6 +322,7 @@ extern int ehca_static_rate;
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extern int ehca_port_act_time;
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extern int ehca_port_act_time;
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extern int ehca_use_hp_mr;
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extern int ehca_use_hp_mr;
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extern int ehca_scaling_code;
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extern int ehca_scaling_code;
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extern int ehca_lock_hcalls;
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struct ipzu_queue_resp {
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struct ipzu_queue_resp {
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u32 qe_size; /* queue entry size */
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u32 qe_size; /* queue entry size */
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@@ -43,13 +43,14 @@
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#ifdef CONFIG_PPC_64K_PAGES
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#ifdef CONFIG_PPC_64K_PAGES
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#include <linux/slab.h>
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#include <linux/slab.h>
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#endif
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#endif
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#include "ehca_classes.h"
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#include "ehca_classes.h"
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#include "ehca_iverbs.h"
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#include "ehca_iverbs.h"
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#include "ehca_mrmw.h"
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#include "ehca_mrmw.h"
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#include "ehca_tools.h"
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#include "ehca_tools.h"
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#include "hcp_if.h"
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#include "hcp_if.h"
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#define HCAD_VERSION "0024"
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#define HCAD_VERSION "0025"
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
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MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
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@@ -66,6 +67,7 @@ int ehca_poll_all_eqs = 1;
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int ehca_static_rate = -1;
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int ehca_static_rate = -1;
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int ehca_scaling_code = 0;
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int ehca_scaling_code = 0;
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int ehca_mr_largepage = 1;
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int ehca_mr_largepage = 1;
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int ehca_lock_hcalls = -1;
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module_param_named(open_aqp1, ehca_open_aqp1, int, S_IRUGO);
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module_param_named(open_aqp1, ehca_open_aqp1, int, S_IRUGO);
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module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
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module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
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@@ -77,6 +79,7 @@ module_param_named(poll_all_eqs, ehca_poll_all_eqs, int, S_IRUGO);
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module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
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module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
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module_param_named(scaling_code, ehca_scaling_code, int, S_IRUGO);
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module_param_named(scaling_code, ehca_scaling_code, int, S_IRUGO);
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module_param_named(mr_largepage, ehca_mr_largepage, int, S_IRUGO);
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module_param_named(mr_largepage, ehca_mr_largepage, int, S_IRUGO);
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module_param_named(lock_hcalls, ehca_lock_hcalls, bool, S_IRUGO);
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MODULE_PARM_DESC(open_aqp1,
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MODULE_PARM_DESC(open_aqp1,
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"AQP1 on startup (0: no (default), 1: yes)");
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"AQP1 on startup (0: no (default), 1: yes)");
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@@ -102,6 +105,9 @@ MODULE_PARM_DESC(scaling_code,
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MODULE_PARM_DESC(mr_largepage,
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MODULE_PARM_DESC(mr_largepage,
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"use large page for MR (0: use PAGE_SIZE (default), "
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"use large page for MR (0: use PAGE_SIZE (default), "
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"1: use large page depending on MR size");
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"1: use large page depending on MR size");
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MODULE_PARM_DESC(lock_hcalls,
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"serialize all hCalls made by the driver "
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"(default: autodetect)");
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DEFINE_RWLOCK(ehca_qp_idr_lock);
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DEFINE_RWLOCK(ehca_qp_idr_lock);
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DEFINE_RWLOCK(ehca_cq_idr_lock);
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DEFINE_RWLOCK(ehca_cq_idr_lock);
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@@ -258,6 +264,7 @@ static struct cap_descr {
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{ HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
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{ HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
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{ HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
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{ HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
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{ HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
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{ HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
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{ HCA_CAP_H_ALLOC_RES_SYNC, "HCA_CAP_H_ALLOC_RES_SYNC" },
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};
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};
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static int ehca_sense_attributes(struct ehca_shca *shca)
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static int ehca_sense_attributes(struct ehca_shca *shca)
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@@ -333,6 +340,12 @@ static int ehca_sense_attributes(struct ehca_shca *shca)
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if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
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if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
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ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
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ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
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/* Autodetect hCall locking -- the "H_ALLOC_RESOURCE synced" flag is
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* a firmware property, so it's valid across all adapters
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*/
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if (ehca_lock_hcalls == -1)
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ehca_lock_hcalls = !(shca->hca_cap & HCA_CAP_H_ALLOC_RES_SYNC);
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/* translate supported MR page sizes; always support 4K */
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/* translate supported MR page sizes; always support 4K */
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shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
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shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
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if (ehca_mr_largepage) { /* support extra sizes only if enabled */
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if (ehca_mr_largepage) { /* support extra sizes only if enabled */
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@@ -838,7 +838,7 @@ struct ib_srq *ehca_create_srq(struct ib_pd *pd,
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/* copy back return values */
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/* copy back return values */
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srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
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srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
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srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
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srq_init_attr->attr.max_sge = 3;
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/* drive SRQ into RTR state */
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/* drive SRQ into RTR state */
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mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
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mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
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@@ -1750,7 +1750,7 @@ int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
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}
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}
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srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
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srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
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srq_attr->max_sge = qpcb->actual_nr_sges_in_rq_wqe;
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srq_attr->max_sge = 3;
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srq_attr->srq_limit = EHCA_BMASK_GET(
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srq_attr->srq_limit = EHCA_BMASK_GET(
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MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
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MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
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@@ -120,26 +120,21 @@ static long ehca_plpar_hcall_norets(unsigned long opcode,
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unsigned long arg7)
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unsigned long arg7)
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{
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{
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long ret;
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long ret;
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int i, sleep_msecs, do_lock;
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int i, sleep_msecs;
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unsigned long flags;
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unsigned long flags = 0;
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ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT,
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ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT,
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opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
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opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7);
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/* lock H_FREE_RESOURCE(MR) against itself and H_ALLOC_RESOURCE(MR) */
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if ((opcode == H_FREE_RESOURCE) && (arg7 == 5)) {
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arg7 = 0; /* better not upset firmware */
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do_lock = 1;
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}
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for (i = 0; i < 5; i++) {
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for (i = 0; i < 5; i++) {
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if (do_lock)
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/* serialize hCalls to work around firmware issue */
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if (ehca_lock_hcalls)
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spin_lock_irqsave(&hcall_lock, flags);
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spin_lock_irqsave(&hcall_lock, flags);
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ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4,
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ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4,
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arg5, arg6, arg7);
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arg5, arg6, arg7);
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if (do_lock)
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if (ehca_lock_hcalls)
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spin_unlock_irqrestore(&hcall_lock, flags);
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spin_unlock_irqrestore(&hcall_lock, flags);
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if (H_IS_LONG_BUSY(ret)) {
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if (H_IS_LONG_BUSY(ret)) {
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@@ -174,24 +169,22 @@ static long ehca_plpar_hcall9(unsigned long opcode,
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unsigned long arg9)
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unsigned long arg9)
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{
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{
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long ret;
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long ret;
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int i, sleep_msecs, do_lock;
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int i, sleep_msecs;
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unsigned long flags = 0;
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unsigned long flags = 0;
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ehca_gen_dbg("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, opcode,
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ehca_gen_dbg("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, opcode,
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arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9);
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arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9);
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/* lock H_ALLOC_RESOURCE(MR) against itself and H_FREE_RESOURCE(MR) */
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do_lock = ((opcode == H_ALLOC_RESOURCE) && (arg2 == 5));
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for (i = 0; i < 5; i++) {
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for (i = 0; i < 5; i++) {
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if (do_lock)
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/* serialize hCalls to work around firmware issue */
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if (ehca_lock_hcalls)
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spin_lock_irqsave(&hcall_lock, flags);
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spin_lock_irqsave(&hcall_lock, flags);
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ret = plpar_hcall9(opcode, outs,
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ret = plpar_hcall9(opcode, outs,
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arg1, arg2, arg3, arg4, arg5,
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arg1, arg2, arg3, arg4, arg5,
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arg6, arg7, arg8, arg9);
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arg6, arg7, arg8, arg9);
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if (do_lock)
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if (ehca_lock_hcalls)
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spin_unlock_irqrestore(&hcall_lock, flags);
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spin_unlock_irqrestore(&hcall_lock, flags);
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if (H_IS_LONG_BUSY(ret)) {
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if (H_IS_LONG_BUSY(ret)) {
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@@ -821,7 +814,7 @@ u64 hipz_h_free_resource_mr(const struct ipz_adapter_handle adapter_handle,
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return ehca_plpar_hcall_norets(H_FREE_RESOURCE,
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return ehca_plpar_hcall_norets(H_FREE_RESOURCE,
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adapter_handle.handle, /* r4 */
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adapter_handle.handle, /* r4 */
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mr->ipz_mr_handle.handle, /* r5 */
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mr->ipz_mr_handle.handle, /* r5 */
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0, 0, 0, 0, 5);
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0, 0, 0, 0, 0);
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}
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}
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u64 hipz_h_reregister_pmr(const struct ipz_adapter_handle adapter_handle,
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u64 hipz_h_reregister_pmr(const struct ipz_adapter_handle adapter_handle,
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@@ -378,6 +378,7 @@ struct hipz_query_hca {
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#define HCA_CAP_UD_LL_QP EHCA_BMASK_IBM(16, 16)
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#define HCA_CAP_UD_LL_QP EHCA_BMASK_IBM(16, 16)
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#define HCA_CAP_RESIZE_MR EHCA_BMASK_IBM(17, 17)
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#define HCA_CAP_RESIZE_MR EHCA_BMASK_IBM(17, 17)
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#define HCA_CAP_MINI_QP EHCA_BMASK_IBM(18, 18)
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#define HCA_CAP_MINI_QP EHCA_BMASK_IBM(18, 18)
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#define HCA_CAP_H_ALLOC_RES_SYNC EHCA_BMASK_IBM(19, 19)
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/* query port response block */
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/* query port response block */
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struct hipz_query_port {
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struct hipz_query_port {
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