e1000e: reformat comment blocks, cosmetic changes only
Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
@@ -1,7 +1,7 @@
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/*******************************************************************************
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Intel PRO/1000 Linux driver
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Copyright(c) 1999 - 2007 Intel Corporation.
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Copyright(c) 1999 - 2008 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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@@ -43,8 +43,8 @@ enum e1000_mng_mode {
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#define E1000_FACTPS_MNGCG 0x20000000
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#define E1000_IAMT_SIGNATURE 0x544D4149 /* Intel(R) Active Management
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* Technology signature */
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/* Intel(R) Active Management Technology signature */
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#define E1000_IAMT_SIGNATURE 0x544D4149
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/**
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* e1000e_get_bus_info_pcie - Get PCIe bus information
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@@ -142,7 +142,8 @@ void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
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{
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u32 rar_low, rar_high;
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/* HW expects these in little endian so we reverse the byte order
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/*
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* HW expects these in little endian so we reverse the byte order
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* from network order (big endian) to little endian
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*/
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rar_low = ((u32) addr[0] |
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@@ -171,7 +172,8 @@ static void e1000_mta_set(struct e1000_hw *hw, u32 hash_value)
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{
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u32 hash_bit, hash_reg, mta;
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/* The MTA is a register array of 32-bit registers. It is
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/*
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* The MTA is a register array of 32-bit registers. It is
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* treated like an array of (32*mta_reg_count) bits. We want to
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* set bit BitArray[hash_value]. So we figure out what register
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* the bit is in, read it, OR in the new bit, then write
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@@ -208,12 +210,15 @@ static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
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/* Register count multiplied by bits per register */
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hash_mask = (hw->mac.mta_reg_count * 32) - 1;
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/* For a mc_filter_type of 0, bit_shift is the number of left-shifts
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* where 0xFF would still fall within the hash mask. */
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/*
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* For a mc_filter_type of 0, bit_shift is the number of left-shifts
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* where 0xFF would still fall within the hash mask.
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*/
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while (hash_mask >> bit_shift != 0xFF)
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bit_shift++;
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/* The portion of the address that is used for the hash table
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/*
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* The portion of the address that is used for the hash table
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* is determined by the mc_filter_type setting.
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* The algorithm is such that there is a total of 8 bits of shifting.
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* The bit_shift for a mc_filter_type of 0 represents the number of
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@@ -224,8 +229,8 @@ static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
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* cases are a variation of this algorithm...essentially raising the
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* number of bits to shift mc_addr[5] left, while still keeping the
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* 8-bit shifting total.
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*/
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/* For example, given the following Destination MAC Address and an
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*
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* For example, given the following Destination MAC Address and an
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* mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),
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* we can see that the bit_shift for case 0 is 4. These are the hash
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* values resulting from each mc_filter_type...
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@@ -279,7 +284,8 @@ void e1000e_mc_addr_list_update_generic(struct e1000_hw *hw,
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u32 hash_value;
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u32 i;
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/* Load the first set of multicast addresses into the exact
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/*
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* Load the first set of multicast addresses into the exact
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* filters (RAR). If there are not enough to fill the RAR
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* array, clear the filters.
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*/
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@@ -375,7 +381,8 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
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s32 ret_val;
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bool link;
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/* We only want to go out to the PHY registers to see if Auto-Neg
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/*
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* We only want to go out to the PHY registers to see if Auto-Neg
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* has completed and/or if our link status has changed. The
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* get_link_status flag is set upon receiving a Link Status
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* Change or Rx Sequence Error interrupt.
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@@ -383,7 +390,8 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
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if (!mac->get_link_status)
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return 0;
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/* First we want to see if the MII Status Register reports
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/*
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* First we want to see if the MII Status Register reports
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* link. If so, then we want to get the current speed/duplex
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* of the PHY.
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*/
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@@ -396,11 +404,14 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
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mac->get_link_status = 0;
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/* Check if there was DownShift, must be checked
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* immediately after link-up */
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/*
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* Check if there was DownShift, must be checked
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* immediately after link-up
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*/
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e1000e_check_downshift(hw);
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/* If we are forcing speed/duplex, then we simply return since
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/*
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* If we are forcing speed/duplex, then we simply return since
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* we have already determined whether we have link or not.
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*/
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if (!mac->autoneg) {
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@@ -408,13 +419,15 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
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return ret_val;
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}
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/* Auto-Neg is enabled. Auto Speed Detection takes care
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/*
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* Auto-Neg is enabled. Auto Speed Detection takes care
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* of MAC speed/duplex configuration. So we only need to
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* configure Collision Distance in the MAC.
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*/
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e1000e_config_collision_dist(hw);
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/* Configure Flow Control now that Auto-Neg has completed.
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/*
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* Configure Flow Control now that Auto-Neg has completed.
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* First, we need to restore the desired flow control
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* settings because we may have had to re-autoneg with a
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* different link partner.
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@@ -446,7 +459,8 @@ s32 e1000e_check_for_fiber_link(struct e1000_hw *hw)
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status = er32(STATUS);
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rxcw = er32(RXCW);
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/* If we don't have link (auto-negotiation failed or link partner
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/*
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* If we don't have link (auto-negotiation failed or link partner
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* cannot auto-negotiate), the cable is plugged in (we have signal),
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* and our link partner is not trying to auto-negotiate with us (we
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* are receiving idles or data), we need to force link up. We also
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@@ -477,7 +491,8 @@ s32 e1000e_check_for_fiber_link(struct e1000_hw *hw)
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return ret_val;
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}
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} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
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/* If we are forcing link and we are receiving /C/ ordered
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/*
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* If we are forcing link and we are receiving /C/ ordered
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* sets, re-enable auto-negotiation in the TXCW register
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* and disable forced link in the Device Control register
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* in an attempt to auto-negotiate with our link partner.
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@@ -511,7 +526,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
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status = er32(STATUS);
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rxcw = er32(RXCW);
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/* If we don't have link (auto-negotiation failed or link partner
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/*
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* If we don't have link (auto-negotiation failed or link partner
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* cannot auto-negotiate), and our link partner is not trying to
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* auto-negotiate with us (we are receiving idles or data),
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* we need to force link up. We also need to give auto-negotiation
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@@ -540,7 +556,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
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return ret_val;
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}
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} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
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/* If we are forcing link and we are receiving /C/ ordered
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/*
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* If we are forcing link and we are receiving /C/ ordered
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* sets, re-enable auto-negotiation in the TXCW register
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* and disable forced link in the Device Control register
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* in an attempt to auto-negotiate with our link partner.
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@@ -551,7 +568,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
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mac->serdes_has_link = 1;
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} else if (!(E1000_TXCW_ANE & er32(TXCW))) {
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/* If we force link for non-auto-negotiation switch, check
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/*
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* If we force link for non-auto-negotiation switch, check
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* link status based on MAC synchronization for internal
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* serdes media type.
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*/
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@@ -589,7 +607,8 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
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s32 ret_val;
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u16 nvm_data;
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/* Read and store word 0x0F of the EEPROM. This word contains bits
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/*
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* Read and store word 0x0F of the EEPROM. This word contains bits
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* that determine the hardware's default PAUSE (flow control) mode,
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* a bit that determines whether the HW defaults to enabling or
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* disabling auto-negotiation, and the direction of the
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@@ -630,7 +649,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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struct e1000_mac_info *mac = &hw->mac;
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s32 ret_val;
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/* In the case of the phy reset being blocked, we already have a link.
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/*
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* In the case of the phy reset being blocked, we already have a link.
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* We do not need to set it up again.
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*/
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if (e1000_check_reset_block(hw))
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@@ -646,7 +666,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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return ret_val;
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}
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/* We want to save off the original Flow Control configuration just
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/*
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* We want to save off the original Flow Control configuration just
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* in case we get disconnected and then reconnected into a different
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* hub or switch with different Flow Control capabilities.
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*/
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@@ -659,7 +680,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw)
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if (ret_val)
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return ret_val;
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/* Initialize the flow control address, type, and PAUSE timer
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/*
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* Initialize the flow control address, type, and PAUSE timer
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* registers to their default values. This is done even if flow
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* control is disabled, because it does not hurt anything to
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* initialize these registers.
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@@ -686,7 +708,8 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
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struct e1000_mac_info *mac = &hw->mac;
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u32 txcw;
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/* Check for a software override of the flow control settings, and
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/*
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* Check for a software override of the flow control settings, and
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* setup the device accordingly. If auto-negotiation is enabled, then
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* software will have to set the "PAUSE" bits to the correct value in
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* the Transmit Config Word Register (TXCW) and re-start auto-
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@@ -700,7 +723,7 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
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* but not send pause frames).
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* 2: Tx flow control is enabled (we can send pause frames but we
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* do not support receiving pause frames).
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* 3: Both Rx and TX flow control (symmetric) are enabled.
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* 3: Both Rx and Tx flow control (symmetric) are enabled.
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*/
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switch (mac->fc) {
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case e1000_fc_none:
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@@ -708,23 +731,26 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
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txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
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break;
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case e1000_fc_rx_pause:
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/* RX Flow control is enabled and TX Flow control is disabled
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/*
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* Rx Flow control is enabled and Tx Flow control is disabled
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* by a software over-ride. Since there really isn't a way to
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* advertise that we are capable of RX Pause ONLY, we will
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* advertise that we support both symmetric and asymmetric RX
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* advertise that we are capable of Rx Pause ONLY, we will
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* advertise that we support both symmetric and asymmetric Rx
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* PAUSE. Later, we will disable the adapter's ability to send
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* PAUSE frames.
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*/
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txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
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break;
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case e1000_fc_tx_pause:
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/* TX Flow control is enabled, and RX Flow control is disabled,
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/*
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* Tx Flow control is enabled, and Rx Flow control is disabled,
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* by a software over-ride.
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*/
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txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR);
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break;
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case e1000_fc_full:
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/* Flow control (both RX and TX) is enabled by a software
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/*
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* Flow control (both Rx and Tx) is enabled by a software
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* over-ride.
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*/
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txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
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@@ -754,7 +780,8 @@ static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
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u32 i, status;
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s32 ret_val;
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/* If we have a signal (the cable is plugged in, or assumed true for
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/*
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* If we have a signal (the cable is plugged in, or assumed true for
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* serdes media) then poll for a "Link-Up" indication in the Device
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* Status Register. Time-out if a link isn't seen in 500 milliseconds
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* seconds (Auto-negotiation should complete in less than 500
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@@ -769,7 +796,8 @@ static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
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if (i == FIBER_LINK_UP_LIMIT) {
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hw_dbg(hw, "Never got a valid link from auto-neg!!!\n");
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mac->autoneg_failed = 1;
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/* AutoNeg failed to achieve a link, so we'll call
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/*
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* AutoNeg failed to achieve a link, so we'll call
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* mac->check_for_link. This routine will force the
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* link up if we detect a signal. This will allow us to
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* communicate with non-autonegotiating link partners.
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@@ -811,7 +839,8 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw)
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if (ret_val)
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return ret_val;
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/* Since auto-negotiation is enabled, take the link out of reset (the
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/*
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* Since auto-negotiation is enabled, take the link out of reset (the
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* link will be in reset, because we previously reset the chip). This
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* will restart auto-negotiation. If auto-negotiation is successful
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* then the link-up status bit will be set and the flow control enable
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@@ -823,7 +852,8 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw)
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e1e_flush();
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msleep(1);
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/* For these adapters, the SW defineable pin 1 is set when the optics
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/*
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* For these adapters, the SW definable pin 1 is set when the optics
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* detect a signal. If we have a signal, then poll for a "Link-Up"
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* indication.
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*/
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@@ -864,21 +894,23 @@ void e1000e_config_collision_dist(struct e1000_hw *hw)
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*
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* Sets the flow control high/low threshold (watermark) registers. If
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* flow control XON frame transmission is enabled, then set XON frame
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* tansmission as well.
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* transmission as well.
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**/
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s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
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{
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struct e1000_mac_info *mac = &hw->mac;
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u32 fcrtl = 0, fcrth = 0;
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/* Set the flow control receive threshold registers. Normally,
|
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/*
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* Set the flow control receive threshold registers. Normally,
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* these registers will be set to a default threshold that may be
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* adjusted later by the driver's runtime code. However, if the
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* ability to transmit pause frames is not enabled, then these
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* registers will be set to 0.
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*/
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if (mac->fc & e1000_fc_tx_pause) {
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/* We need to set up the Receive Threshold high and low water
|
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/*
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* We need to set up the Receive Threshold high and low water
|
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* marks as well as (optionally) enabling the transmission of
|
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* XON frames.
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*/
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@@ -909,7 +941,8 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw)
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ctrl = er32(CTRL);
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/* Because we didn't get link via the internal auto-negotiation
|
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/*
|
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* Because we didn't get link via the internal auto-negotiation
|
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* mechanism (we either forced link or we got link via PHY
|
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* auto-neg), we have to manually enable/disable transmit an
|
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* receive flow control.
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@@ -923,7 +956,7 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw)
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* frames but not send pause frames).
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* 2: Tx flow control is enabled (we can send pause frames
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* frames but we do not receive pause frames).
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* 3: Both Rx and TX flow control (symmetric) is enabled.
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* 3: Both Rx and Tx flow control (symmetric) is enabled.
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* other: No other values should be possible at this point.
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*/
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hw_dbg(hw, "mac->fc = %u\n", mac->fc);
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@@ -970,7 +1003,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;
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u16 speed, duplex;
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/* Check for the case where we have fiber media and auto-neg failed
|
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/*
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* Check for the case where we have fiber media and auto-neg failed
|
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* so we had to force link. In this case, we need to force the
|
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* configuration of the MAC to match the "fc" parameter.
|
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*/
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@@ -988,13 +1022,15 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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return ret_val;
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}
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/* Check for the case where we have copper media and auto-neg is
|
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/*
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* Check for the case where we have copper media and auto-neg is
|
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* enabled. In this case, we need to check and see if Auto-Neg
|
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* has completed, and if so, how the PHY and link partner has
|
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* flow control configured.
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*/
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if ((hw->media_type == e1000_media_type_copper) && mac->autoneg) {
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/* Read the MII Status Register and check to see if AutoNeg
|
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/*
|
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* Read the MII Status Register and check to see if AutoNeg
|
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* has completed. We read this twice because this reg has
|
||||
* some "sticky" (latched) bits.
|
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*/
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@@ -1011,7 +1047,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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return ret_val;
|
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}
|
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/* The AutoNeg process has completed, so we now need to
|
||||
/*
|
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* The AutoNeg process has completed, so we now need to
|
||||
* read both the Auto Negotiation Advertisement
|
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* Register (Address 4) and the Auto_Negotiation Base
|
||||
* Page Ability Register (Address 5) to determine how
|
||||
@@ -1024,7 +1061,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
if (ret_val)
|
||||
return ret_val;
|
||||
|
||||
/* Two bits in the Auto Negotiation Advertisement Register
|
||||
/*
|
||||
* Two bits in the Auto Negotiation Advertisement Register
|
||||
* (Address 4) and two bits in the Auto Negotiation Base
|
||||
* Page Ability Register (Address 5) determine flow control
|
||||
* for both the PHY and the link partner. The following
|
||||
@@ -1045,8 +1083,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
* 1 | 1 | 0 | 0 | e1000_fc_none
|
||||
* 1 | 1 | 0 | 1 | e1000_fc_rx_pause
|
||||
*
|
||||
*/
|
||||
/* Are both PAUSE bits set to 1? If so, this implies
|
||||
*
|
||||
* Are both PAUSE bits set to 1? If so, this implies
|
||||
* Symmetric Flow Control is enabled at both ends. The
|
||||
* ASM_DIR bits are irrelevant per the spec.
|
||||
*
|
||||
@@ -1060,9 +1098,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
*/
|
||||
if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
|
||||
(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
|
||||
/* Now we need to check if the user selected RX ONLY
|
||||
/*
|
||||
* Now we need to check if the user selected Rx ONLY
|
||||
* of pause frames. In this case, we had to advertise
|
||||
* FULL flow control because we could not advertise RX
|
||||
* FULL flow control because we could not advertise Rx
|
||||
* ONLY. Hence, we must now check to see if we need to
|
||||
* turn OFF the TRANSMISSION of PAUSE frames.
|
||||
*/
|
||||
@@ -1075,7 +1114,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
"RX PAUSE frames only.\r\n");
|
||||
}
|
||||
}
|
||||
/* For receiving PAUSE frames ONLY.
|
||||
/*
|
||||
* For receiving PAUSE frames ONLY.
|
||||
*
|
||||
* LOCAL DEVICE | LINK PARTNER
|
||||
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
|
||||
@@ -1090,7 +1130,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
mac->fc = e1000_fc_tx_pause;
|
||||
hw_dbg(hw, "Flow Control = TX PAUSE frames only.\r\n");
|
||||
}
|
||||
/* For transmitting PAUSE frames ONLY.
|
||||
/*
|
||||
* For transmitting PAUSE frames ONLY.
|
||||
*
|
||||
* LOCAL DEVICE | LINK PARTNER
|
||||
* PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
|
||||
@@ -1113,7 +1154,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
hw_dbg(hw, "Flow Control = NONE.\r\n");
|
||||
}
|
||||
|
||||
/* Now we need to do one last check... If we auto-
|
||||
/*
|
||||
* Now we need to do one last check... If we auto-
|
||||
* negotiated to HALF DUPLEX, flow control should not be
|
||||
* enabled per IEEE 802.3 spec.
|
||||
*/
|
||||
@@ -1126,7 +1168,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
if (duplex == HALF_DUPLEX)
|
||||
mac->fc = e1000_fc_none;
|
||||
|
||||
/* Now we call a subroutine to actually force the MAC
|
||||
/*
|
||||
* Now we call a subroutine to actually force the MAC
|
||||
* controller to use the correct flow control settings.
|
||||
*/
|
||||
ret_val = e1000e_force_mac_fc(hw);
|
||||
@@ -1398,8 +1441,10 @@ s32 e1000e_blink_led(struct e1000_hw *hw)
|
||||
ledctl_blink = E1000_LEDCTL_LED0_BLINK |
|
||||
(E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
|
||||
} else {
|
||||
/* set the blink bit for each LED that's "on" (0x0E)
|
||||
* in ledctl_mode2 */
|
||||
/*
|
||||
* set the blink bit for each LED that's "on" (0x0E)
|
||||
* in ledctl_mode2
|
||||
*/
|
||||
ledctl_blink = hw->mac.ledctl_mode2;
|
||||
for (i = 0; i < 4; i++)
|
||||
if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
|
||||
@@ -1562,8 +1607,7 @@ void e1000e_update_adaptive(struct e1000_hw *hw)
|
||||
else
|
||||
mac->current_ifs_val +=
|
||||
mac->ifs_step_size;
|
||||
ew32(AIT,
|
||||
mac->current_ifs_val);
|
||||
ew32(AIT, mac->current_ifs_val);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
@@ -1826,10 +1870,12 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
|
||||
udelay(1);
|
||||
timeout = NVM_MAX_RETRY_SPI;
|
||||
|
||||
/* Read "Status Register" repeatedly until the LSB is cleared.
|
||||
/*
|
||||
* Read "Status Register" repeatedly until the LSB is cleared.
|
||||
* The EEPROM will signal that the command has been completed
|
||||
* by clearing bit 0 of the internal status register. If it's
|
||||
* not cleared within 'timeout', then error out. */
|
||||
* not cleared within 'timeout', then error out.
|
||||
*/
|
||||
while (timeout) {
|
||||
e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
|
||||
hw->nvm.opcode_bits);
|
||||
@@ -1866,8 +1912,10 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
||||
u32 i, eerd = 0;
|
||||
s32 ret_val = 0;
|
||||
|
||||
/* A check for invalid values: offset too large, too many words,
|
||||
* and not enough words. */
|
||||
/*
|
||||
* A check for invalid values: offset too large, too many words,
|
||||
* too many words for the offset, and not enough words.
|
||||
*/
|
||||
if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
|
||||
(words == 0)) {
|
||||
hw_dbg(hw, "nvm parameter(s) out of bounds\n");
|
||||
@@ -1883,8 +1931,7 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
||||
if (ret_val)
|
||||
break;
|
||||
|
||||
data[i] = (er32(EERD) >>
|
||||
E1000_NVM_RW_REG_DATA);
|
||||
data[i] = (er32(EERD) >> E1000_NVM_RW_REG_DATA);
|
||||
}
|
||||
|
||||
return ret_val;
|
||||
@@ -1908,8 +1955,10 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
||||
s32 ret_val;
|
||||
u16 widx = 0;
|
||||
|
||||
/* A check for invalid values: offset too large, too many words,
|
||||
* and not enough words. */
|
||||
/*
|
||||
* A check for invalid values: offset too large, too many words,
|
||||
* and not enough words.
|
||||
*/
|
||||
if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
|
||||
(words == 0)) {
|
||||
hw_dbg(hw, "nvm parameter(s) out of bounds\n");
|
||||
@@ -1939,8 +1988,10 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
||||
|
||||
e1000_standby_nvm(hw);
|
||||
|
||||
/* Some SPI eeproms use the 8th address bit embedded in the
|
||||
* opcode */
|
||||
/*
|
||||
* Some SPI eeproms use the 8th address bit embedded in the
|
||||
* opcode
|
||||
*/
|
||||
if ((nvm->address_bits == 8) && (offset >= 128))
|
||||
write_opcode |= NVM_A8_OPCODE_SPI;
|
||||
|
||||
@@ -1985,9 +2036,9 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw)
|
||||
/* Check for an alternate MAC address. An alternate MAC
|
||||
* address can be setup by pre-boot software and must be
|
||||
* treated like a permanent address and must override the
|
||||
* actual permanent MAC address. */
|
||||
* actual permanent MAC address.*/
|
||||
ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1,
|
||||
&mac_addr_offset);
|
||||
&mac_addr_offset);
|
||||
if (ret_val) {
|
||||
hw_dbg(hw, "NVM Read Error\n");
|
||||
return ret_val;
|
||||
@@ -2000,7 +2051,7 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw)
|
||||
mac_addr_offset += ETH_ALEN/sizeof(u16);
|
||||
|
||||
/* make sure we have a valid mac address here
|
||||
* before using it */
|
||||
* before using it */
|
||||
ret_val = e1000_read_nvm(hw, mac_addr_offset, 1,
|
||||
&nvm_data);
|
||||
if (ret_val) {
|
||||
@@ -2012,7 +2063,7 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw)
|
||||
}
|
||||
|
||||
if (mac_addr_offset)
|
||||
hw->dev_spec.e82571.alt_mac_addr_is_present = 1;
|
||||
hw->dev_spec.e82571.alt_mac_addr_is_present = 1;
|
||||
}
|
||||
|
||||
for (i = 0; i < ETH_ALEN; i += 2) {
|
||||
@@ -2188,7 +2239,7 @@ bool e1000e_check_mng_mode(struct e1000_hw *hw)
|
||||
}
|
||||
|
||||
/**
|
||||
* e1000e_enable_tx_pkt_filtering - Enable packet filtering on TX
|
||||
* e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx
|
||||
* @hw: pointer to the HW structure
|
||||
*
|
||||
* Enables packet filtering on transmit packets if manageability is enabled
|
||||
@@ -2208,7 +2259,8 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* If we can't read from the host interface for whatever
|
||||
/*
|
||||
* If we can't read from the host interface for whatever
|
||||
* reason, disable filtering.
|
||||
*/
|
||||
ret_val = e1000_mng_enable_host_if(hw);
|
||||
@@ -2226,7 +2278,8 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
|
||||
hdr->checksum = 0;
|
||||
csum = e1000_calculate_checksum((u8 *)hdr,
|
||||
E1000_MNG_DHCP_COOKIE_LENGTH);
|
||||
/* If either the checksums or signature don't match, then
|
||||
/*
|
||||
* If either the checksums or signature don't match, then
|
||||
* the cookie area isn't considered valid, in which case we
|
||||
* take the safe route of assuming Tx filtering is enabled.
|
||||
*/
|
||||
@@ -2318,8 +2371,10 @@ static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer,
|
||||
/* Calculate length in DWORDs */
|
||||
length >>= 2;
|
||||
|
||||
/* The device driver writes the relevant command block into the
|
||||
* ram area. */
|
||||
/*
|
||||
* The device driver writes the relevant command block into the
|
||||
* ram area.
|
||||
*/
|
||||
for (i = 0; i < length; i++) {
|
||||
for (j = 0; j < sizeof(u32); j++) {
|
||||
*(tmp + j) = *bufptr++;
|
||||
|
Reference in New Issue
Block a user