Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: (35 commits) [CPUFREQ] Prevent p4-clockmod from auto-binding to the ondemand governor. [CPUFREQ] Make cpufreq-nforce2 less obnoxious [CPUFREQ] p4-clockmod reports wrong frequency. [CPUFREQ] powernow-k8: Use a common exit path. [CPUFREQ] Change link order of x86 cpufreq modules [CPUFREQ] conservative: remove 10x from def_sampling_rate [CPUFREQ] conservative: fixup governor to function more like ondemand logic [CPUFREQ] conservative: fix dbs_cpufreq_notifier so freq is not locked [CPUFREQ] conservative: amend author's email address [CPUFREQ] Use swap() in longhaul.c [CPUFREQ] checkpatch cleanups for acpi-cpufreq [CPUFREQ] powernow-k8: Only print error message once, not per core. [CPUFREQ] ondemand/conservative: sanitize sampling_rate restrictions [CPUFREQ] ondemand/conservative: deprecate sampling_rate{min,max} [CPUFREQ] powernow-k8: Always compile powernow-k8 driver with ACPI support [CPUFREQ] Introduce /sys/devices/system/cpu/cpu*/cpufreq/cpuinfo_transition_latency [CPUFREQ] checkpatch cleanups for powernow-k8 [CPUFREQ] checkpatch cleanups for ondemand governor. [CPUFREQ] checkpatch cleanups for powernow-k7 [CPUFREQ] checkpatch cleanups for speedstep related drivers. ...
This commit is contained in:
@@ -27,15 +27,17 @@
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#include <linux/cpufreq.h>
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#include <linux/slab.h>
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#include <linux/cpumask.h>
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#include <linux/timex.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <asm/timex.h>
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#include <asm/timer.h>
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#include "speedstep-lib.h"
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#define PFX "p4-clockmod: "
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
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"p4-clockmod", msg)
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/*
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* Duty Cycle (3bits), note DC_DISABLE is not specified in
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@@ -58,7 +60,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
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{
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u32 l, h;
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if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
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if (!cpu_online(cpu) ||
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(newstate > DC_DISABLE) || (newstate == DC_RESV))
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return -EINVAL;
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rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h);
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@@ -66,7 +69,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
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if (l & 0x01)
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dprintk("CPU#%d currently thermal throttled\n", cpu);
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if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
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if (has_N44_O17_errata[cpu] &&
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(newstate == DC_25PT || newstate == DC_DFLT))
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newstate = DC_38PT;
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rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
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@@ -112,7 +116,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
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struct cpufreq_freqs freqs;
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int i;
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if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
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if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0],
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target_freq, relation, &newstate))
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return -EINVAL;
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freqs.old = cpufreq_p4_get(policy->cpu);
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@@ -127,7 +132,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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}
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/* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
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/* run on each logical CPU,
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* see section 13.15.3 of IA32 Intel Architecture Software
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* Developer's Manual, Volume 3
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*/
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for_each_cpu(i, policy->cpus)
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@@ -153,28 +159,30 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
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{
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if (c->x86 == 0x06) {
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if (cpu_has(c, X86_FEATURE_EST))
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printk(KERN_WARNING PFX "Warning: EST-capable CPU detected. "
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"The acpi-cpufreq module offers voltage scaling"
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" in addition of frequency scaling. You should use "
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"that instead of p4-clockmod, if possible.\n");
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printk(KERN_WARNING PFX "Warning: EST-capable CPU "
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"detected. The acpi-cpufreq module offers "
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"voltage scaling in addition of frequency "
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"scaling. You should use that instead of "
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"p4-clockmod, if possible.\n");
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switch (c->x86_model) {
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case 0x0E: /* Core */
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case 0x0F: /* Core Duo */
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case 0x16: /* Celeron Core */
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);
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return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
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case 0x0D: /* Pentium M (Dothan) */
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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/* fall through */
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case 0x09: /* Pentium M (Banias) */
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
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return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
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}
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}
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if (c->x86 != 0xF) {
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if (!cpu_has(c, X86_FEATURE_EST))
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printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. "
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"Please send an e-mail to <cpufreq@vger.kernel.org>\n");
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printk(KERN_WARNING PFX "Unknown CPU. "
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"Please send an e-mail to "
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"<cpufreq@vger.kernel.org>\n");
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return 0;
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}
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@@ -182,16 +190,16 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
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* throttling is active or not. */
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p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
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if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
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if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4M) {
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printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
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"The speedstep-ich or acpi cpufreq modules offer "
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"voltage scaling in addition of frequency scaling. "
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"You should use either one instead of p4-clockmod, "
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"if possible.\n");
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
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return speedstep_get_frequency(SPEEDSTEP_CPU_P4M);
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}
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return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
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return speedstep_get_frequency(SPEEDSTEP_CPU_P4D);
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}
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@@ -217,14 +225,20 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
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dprintk("has errata -- disabling low frequencies\n");
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}
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if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4D &&
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c->x86_model < 2) {
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/* switch to maximum frequency and measure result */
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cpufreq_p4_setdc(policy->cpu, DC_DISABLE);
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recalibrate_cpu_khz();
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}
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/* get max frequency */
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stock_freq = cpufreq_p4_get_frequency(c);
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if (!stock_freq)
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return -EINVAL;
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/* table init */
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for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
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if ((i<2) && (has_N44_O17_errata[policy->cpu]))
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for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
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if ((i < 2) && (has_N44_O17_errata[policy->cpu]))
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p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
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else
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p4clockmod_table[i].frequency = (stock_freq * i)/8;
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@@ -232,7 +246,10 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
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cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
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/* cpuinfo and default policy values */
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policy->cpuinfo.transition_latency = 1000000; /* assumed */
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/* the transition latency is set to be 1 higher than the maximum
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* transition latency of the ondemand governor */
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policy->cpuinfo.transition_latency = 10000001;
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policy->cur = stock_freq;
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return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
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@@ -258,12 +275,12 @@ static unsigned int cpufreq_p4_get(unsigned int cpu)
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l = DC_DISABLE;
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if (l != DC_DISABLE)
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return (stock_freq * l / 8);
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return stock_freq * l / 8;
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return stock_freq;
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}
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static struct freq_attr* p4clockmod_attr[] = {
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static struct freq_attr *p4clockmod_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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@@ -298,9 +315,10 @@ static int __init cpufreq_p4_init(void)
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ret = cpufreq_register_driver(&p4clockmod_driver);
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if (!ret)
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printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
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printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock "
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"Modulation available\n");
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return (ret);
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return ret;
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}
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@@ -310,9 +328,9 @@ static void __exit cpufreq_p4_exit(void)
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}
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MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
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MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
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MODULE_LICENSE ("GPL");
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MODULE_AUTHOR("Zwane Mwaikambo <zwane@commfireservices.com>");
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MODULE_DESCRIPTION("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
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MODULE_LICENSE("GPL");
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late_initcall(cpufreq_p4_init);
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module_exit(cpufreq_p4_exit);
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