x86: coding style fixes to arch/x86/kernel/cpu/cyrix.c
Before: total: 46 errors, 10 warnings, 450 lines checked After: total: 1 errors, 10 warnings, 449 lines checked No code changed: arch/x86/kernel/cpu/cyrix.o: text data bss dec hex filename 2048 908 4 2960 b90 cyrix.o.before 2048 908 4 2960 b90 cyrix.o.after md5: 9add5e69dbd788f91ff24eea8462dad7 cyrix.o.before.asm 9add5e69dbd788f91ff24eea8462dad7 cyrix.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Paolo Ciarrocchi
committed by
Ingo Molnar
Ingo Molnar
parent
7030760ae5
commit
adf85265b4
@@ -37,8 +37,7 @@ static void __cpuinit do_cyrix_devid(unsigned char *dir0, unsigned char *dir1)
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setCx86(CX86_CCR2, ccr2);
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*dir0 = 0xfe;
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}
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}
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else {
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} else {
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setCx86(CX86_CCR3, ccr3); /* restore CCR3 */
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/* read DIR0 and DIR1 CPU registers */
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@@ -132,7 +131,7 @@ static void __cpuinit set_cx86_memwb(void)
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/* set 'Not Write-through' */
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write_cr0(read_cr0() | X86_CR0_NW);
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/* CCR2 bit 2: lock NW bit and set WT1 */
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setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14 );
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setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
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}
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static void __cpuinit set_cx86_inc(void)
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@@ -187,12 +186,14 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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char *buf = c->x86_model_id;
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const char *p = NULL;
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/* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
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3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
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/*
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* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
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* 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway
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*/
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clear_bit(0*32+31, c->x86_capability);
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/* Cyrix used bit 24 in extended (AMD) CPUID for Cyrix MMX extensions */
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if ( test_bit(1*32+24, c->x86_capability) ) {
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if (test_bit(1*32+24, c->x86_capability)) {
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clear_bit(1*32+24, c->x86_capability);
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set_bit(X86_FEATURE_CXMMX, c->x86_capability);
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}
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@@ -250,17 +251,18 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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#ifdef CONFIG_PCI
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{
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u32 vendor, device;
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/* It isn't really a PCI quirk directly, but the cure is the
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same. The MediaGX has deep magic SMM stuff that handles the
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SB emulation. It throws away the fifo on disable_dma() which
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is wrong and ruins the audio.
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Bug2: VSA1 has a wrap bug so that using maximum sized DMA
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causes bad things. According to NatSemi VSA2 has another
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bug to do with 'hlt'. I've not seen any boards using VSA2
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and X doesn't seem to support it either so who cares 8).
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VSA1 we work around however.
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*/
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/*
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* It isn't really a PCI quirk directly, but the cure is the
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* same. The MediaGX has deep magic SMM stuff that handles the
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* SB emulation. It throws away the fifo on disable_dma() which
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* is wrong and ruins the audio.
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*
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* Bug2: VSA1 has a wrap bug so that using maximum sized DMA
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* causes bad things. According to NatSemi VSA2 has another
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* bug to do with 'hlt'. I've not seen any boards using VSA2
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* and X doesn't seem to support it either so who cares 8).
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* VSA1 we work around however.
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*/
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printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n");
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isa_dma_bridge_buggy = 2;
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@@ -279,7 +281,7 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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mark_tsc_unstable("cyrix 5510/5520 detected");
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}
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#endif
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c->x86_cache_size=16; /* Yep 16K integrated cache thats it */
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c->x86_cache_size = 16; /* Yep 16K integrated cache thats it */
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/* GXm supports extended cpuid levels 'ala' AMD */
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if (c->cpuid_level == 2) {
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@@ -292,33 +294,29 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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* ? : 0x7x
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* GX1 : 0x8x GX1 datasheet 56
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*/
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if((0x30 <= dir1 && dir1 <= 0x6f) || (0x80 <=dir1 && dir1 <= 0x8f))
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if ((0x30 <= dir1 && dir1 <= 0x6f) || (0x80 <= dir1 && dir1 <= 0x8f))
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geode_configure();
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get_model_name(c); /* get CPU marketing name */
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return;
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}
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else { /* MediaGX */
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} else { /* MediaGX */
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Cx86_cb[2] = (dir0_lsn & 1) ? '3' : '4';
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p = Cx86_cb+2;
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c->x86_model = (dir1 & 0x20) ? 1 : 2;
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}
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break;
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case 5: /* 6x86MX/M II */
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if (dir1 > 7)
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{
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case 5: /* 6x86MX/M II */
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if (dir1 > 7) {
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dir0_msn++; /* M II */
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/* Enable MMX extensions (App note 108) */
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setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
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}
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else
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{
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} else {
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c->coma_bug = 1; /* 6x86MX, it has the bug. */
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}
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tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0;
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Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7];
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p = Cx86_cb+tmp;
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if (((dir1 & 0x0f) > 4) || ((dir1 & 0xf0) == 0x20))
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if (((dir1 & 0x0f) > 4) || ((dir1 & 0xf0) == 0x20))
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(c->x86_model)++;
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/* Emulate MTRRs using Cyrix's ARRs. */
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set_bit(X86_FEATURE_CYRIX_ARR, c->x86_capability);
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@@ -343,7 +341,8 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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break;
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}
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strcpy(buf, Cx86_model[dir0_msn & 7]);
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if (p) strcat(buf, p);
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if (p)
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strcat(buf, p);
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return;
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}
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@@ -352,7 +351,8 @@ static void __cpuinit init_cyrix(struct cpuinfo_x86 *c)
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*/
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static void __cpuinit init_nsc(struct cpuinfo_x86 *c)
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{
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/* There may be GX1 processors in the wild that are branded
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/*
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* There may be GX1 processors in the wild that are branded
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* NSC and not Cyrix.
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*
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* This function only handles the GX processor, and kicks every
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@@ -398,27 +398,26 @@ static inline int test_cyrix_52div(void)
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return (unsigned char) (test >> 8) == 0x02;
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}
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static void __cpuinit cyrix_identify(struct cpuinfo_x86 * c)
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static void __cpuinit cyrix_identify(struct cpuinfo_x86 *c)
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{
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/* Detect Cyrix with disabled CPUID */
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if ( c->x86 == 4 && test_cyrix_52div() ) {
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if (c->x86 == 4 && test_cyrix_52div()) {
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unsigned char dir0, dir1;
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strcpy(c->x86_vendor_id, "CyrixInstead");
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c->x86_vendor = X86_VENDOR_CYRIX;
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c->x86_vendor = X86_VENDOR_CYRIX;
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/* Actually enable cpuid on the older cyrix */
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/* Actually enable cpuid on the older cyrix */
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/* Retrieve CPU revisions */
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/* Retrieve CPU revisions */
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do_cyrix_devid(&dir0, &dir1);
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dir0>>=4;
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dir0 >>= 4;
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/* Check it is an affected model */
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if (dir0 == 5 || dir0 == 3)
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{
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if (dir0 == 5 || dir0 == 3) {
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unsigned char ccr3;
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unsigned long flags;
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printk(KERN_INFO "Enabling CPUID on Cyrix processor.\n");
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@@ -434,7 +433,7 @@ static void __cpuinit cyrix_identify(struct cpuinfo_x86 * c)
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static struct cpu_dev cyrix_cpu_dev __cpuinitdata = {
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.c_vendor = "Cyrix",
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.c_ident = { "CyrixInstead" },
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.c_ident = { "CyrixInstead" },
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.c_init = init_cyrix,
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.c_identify = cyrix_identify,
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};
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@@ -443,7 +442,7 @@ cpu_vendor_dev_register(X86_VENDOR_CYRIX, &cyrix_cpu_dev);
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static struct cpu_dev nsc_cpu_dev __cpuinitdata = {
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.c_vendor = "NSC",
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.c_ident = { "Geode by NSC" },
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.c_ident = { "Geode by NSC" },
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.c_init = init_nsc,
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};
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