[ARM] ep93xx: convert to clkdev and match clocks by struct device where possible
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
committed by
Russell King
parent
5e1dbdb458
commit
ae696fd532
@@ -276,6 +276,7 @@ config ARCH_EP93XX
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select ARM_VIC
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select ARM_VIC
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select GENERIC_GPIO
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select GENERIC_GPIO
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select HAVE_CLK
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select HAVE_CLK
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select COMMON_CLKDEV
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_REQUIRE_GPIOLIB
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help
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help
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This enables support for the Cirrus EP93xx series of CPUs.
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This enables support for the Cirrus EP93xx series of CPUs.
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@@ -16,11 +16,12 @@
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/string.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <asm/clkdev.h>
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#include <asm/div64.h>
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#include <asm/div64.h>
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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struct clk {
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struct clk {
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char *name;
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unsigned long rate;
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unsigned long rate;
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int users;
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int users;
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u32 enable_reg;
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u32 enable_reg;
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@@ -28,53 +29,33 @@ struct clk {
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};
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};
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static struct clk clk_uart = {
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static struct clk clk_uart = {
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.name = "UARTCLK",
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.rate = 14745600,
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.rate = 14745600,
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};
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};
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static struct clk clk_pll1 = {
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static struct clk clk_pll1;
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.name = "pll1",
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static struct clk clk_f;
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};
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static struct clk clk_h;
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static struct clk clk_f = {
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static struct clk clk_p;
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.name = "fclk",
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static struct clk clk_pll2;
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};
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static struct clk clk_h = {
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.name = "hclk",
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};
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static struct clk clk_p = {
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.name = "pclk",
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};
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static struct clk clk_pll2 = {
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.name = "pll2",
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};
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static struct clk clk_usb_host = {
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static struct clk clk_usb_host = {
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.name = "usb_host",
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.enable_reg = EP93XX_SYSCON_CLOCK_CONTROL,
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.enable_reg = EP93XX_SYSCON_CLOCK_CONTROL,
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.enable_mask = EP93XX_SYSCON_CLOCK_USH_EN,
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.enable_mask = EP93XX_SYSCON_CLOCK_USH_EN,
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};
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};
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#define INIT_CK(dev,con,ck) \
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{ .dev_id = dev, .con_id = con, .clk = ck }
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static struct clk *clocks[] = {
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static struct clk_lookup clocks[] = {
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&clk_uart,
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INIT_CK("apb:uart1", NULL, &clk_uart),
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&clk_pll1,
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INIT_CK("apb:uart2", NULL, &clk_uart),
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&clk_f,
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INIT_CK("apb:uart3", NULL, &clk_uart),
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&clk_h,
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INIT_CK(NULL, "pll1", &clk_pll1),
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&clk_p,
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INIT_CK(NULL, "fclk", &clk_f),
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&clk_pll2,
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INIT_CK(NULL, "hclk", &clk_h),
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&clk_usb_host,
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INIT_CK(NULL, "pclk", &clk_p),
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INIT_CK(NULL, "pll2", &clk_pll2),
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INIT_CK(NULL, "usb_host", &clk_usb_host),
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};
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};
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struct clk *clk_get(struct device *dev, const char *id)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(clocks); i++) {
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if (!strcmp(clocks[i]->name, id))
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return clocks[i];
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}
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return ERR_PTR(-ENOENT);
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}
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EXPORT_SYMBOL(clk_get);
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int clk_enable(struct clk *clk)
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int clk_enable(struct clk *clk)
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{
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{
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@@ -106,12 +87,6 @@ unsigned long clk_get_rate(struct clk *clk)
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}
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}
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EXPORT_SYMBOL(clk_get_rate);
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EXPORT_SYMBOL(clk_get_rate);
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void clk_put(struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_put);
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static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
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static char fclk_divisors[] = { 1, 2, 4, 8, 16, 1, 1, 1 };
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static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
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static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 };
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@@ -138,6 +113,7 @@ static unsigned long calc_pll_rate(u32 config_word)
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static int __init ep93xx_clock_init(void)
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static int __init ep93xx_clock_init(void)
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{
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{
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u32 value;
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u32 value;
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int i;
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value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
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value = __raw_readl(EP93XX_SYSCON_CLOCK_SET1);
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if (!(value & 0x00800000)) { /* PLL1 bypassed? */
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if (!(value & 0x00800000)) { /* PLL1 bypassed? */
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@@ -165,6 +141,8 @@ static int __init ep93xx_clock_init(void)
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clk_f.rate / 1000000, clk_h.rate / 1000000,
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clk_f.rate / 1000000, clk_h.rate / 1000000,
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clk_p.rate / 1000000);
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clk_p.rate / 1000000);
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for (i = 0; i < ARRAY_SIZE(clocks); i++)
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clkdev_add(&clocks[i]);
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return 0;
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return 0;
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}
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}
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arch_initcall(ep93xx_clock_init);
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arch_initcall(ep93xx_clock_init);
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7
arch/arm/mach-ep93xx/include/mach/clkdev.h
Normal file
7
arch/arm/mach-ep93xx/include/mach/clkdev.h
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@@ -0,0 +1,7 @@
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#ifndef __ASM_MACH_CLKDEV_H
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#define __ASM_MACH_CLKDEV_H
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#define __clk_get(clk) ({ 1; })
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#define __clk_put(clk) do { } while (0)
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#endif
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