Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, geode: add a VSA2 ID for General Software x86: use BOOTMEM_EXCLUSIVE on 32-bit x86, 32-bit: fix boot failure on TSC-less processors x86: fix NULL pointer deref in __switch_to x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.
This commit is contained in:
@@ -166,6 +166,8 @@ int geode_has_vsa2(void)
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static int has_vsa2 = -1;
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static int has_vsa2 = -1;
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if (has_vsa2 == -1) {
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if (has_vsa2 == -1) {
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u16 val;
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/*
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/*
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* The VSA has virtual registers that we can query for a
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* The VSA has virtual registers that we can query for a
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* signature.
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* signature.
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@@ -173,7 +175,8 @@ int geode_has_vsa2(void)
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outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
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outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
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outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
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outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
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has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
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val = inw(VSA_VRC_DATA);
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has_vsa2 = (val == AMD_VSA_SIG || val == GSW_VSA_SIG);
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}
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}
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return has_vsa2;
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return has_vsa2;
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@@ -333,6 +333,7 @@ void flush_thread(void)
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/*
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/*
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* Forget coprocessor state..
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* Forget coprocessor state..
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*/
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*/
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tsk->fpu_counter = 0;
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clear_fpu(tsk);
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clear_fpu(tsk);
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clear_used_math();
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clear_used_math();
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}
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}
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@@ -294,6 +294,7 @@ void flush_thread(void)
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/*
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/*
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* Forget coprocessor state..
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* Forget coprocessor state..
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*/
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*/
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tsk->fpu_counter = 0;
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clear_fpu(tsk);
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clear_fpu(tsk);
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clear_used_math();
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clear_used_math();
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}
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}
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@@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void)
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(unsigned long)(crash_size >> 20),
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(unsigned long)(crash_size >> 20),
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(unsigned long)(crash_base >> 20),
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(unsigned long)(crash_base >> 20),
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(unsigned long)(total_mem >> 20));
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(unsigned long)(total_mem >> 20));
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if (reserve_bootmem(crash_base, crash_size,
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BOOTMEM_EXCLUSIVE) < 0) {
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printk(KERN_INFO "crashkernel reservation "
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"failed - memory is in use\n");
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return;
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}
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crashk_res.start = crash_base;
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crashk_res.start = crash_base;
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crashk_res.end = crash_base + crash_size - 1;
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crashk_res.end = crash_base + crash_size - 1;
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reserve_bootmem(crash_base, crash_size,
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BOOTMEM_DEFAULT);
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} else
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} else
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printk(KERN_INFO "crashkernel reservation failed - "
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printk(KERN_INFO "crashkernel reservation failed - "
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"you have to specify a base address\n");
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"you have to specify a base address\n");
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@@ -14,7 +14,10 @@
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#include "mach_timer.h"
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#include "mach_timer.h"
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static int tsc_disabled;
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/* native_sched_clock() is called before tsc_init(), so
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we must start with the TSC soft disabled to prevent
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erroneous rdtsc usage on !cpu_has_tsc processors */
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static int tsc_disabled = -1;
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/*
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/*
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* On some systems the TSC frequency does not
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* On some systems the TSC frequency does not
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@@ -402,25 +405,20 @@ void __init tsc_init(void)
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{
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{
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int cpu;
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int cpu;
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if (!cpu_has_tsc || tsc_disabled) {
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if (!cpu_has_tsc || tsc_disabled > 0)
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/* Disable the TSC in case of !cpu_has_tsc */
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tsc_disabled = 1;
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return;
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return;
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}
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cpu_khz = calculate_cpu_khz();
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cpu_khz = calculate_cpu_khz();
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tsc_khz = cpu_khz;
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tsc_khz = cpu_khz;
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if (!cpu_khz) {
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if (!cpu_khz) {
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mark_tsc_unstable("could not calculate TSC khz");
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mark_tsc_unstable("could not calculate TSC khz");
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/*
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* We need to disable the TSC completely in this case
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* to prevent sched_clock() from using it.
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*/
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tsc_disabled = 1;
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return;
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return;
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}
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}
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/* now allow native_sched_clock() to use rdtsc */
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tsc_disabled = 0;
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printk("Detected %lu.%03lu MHz processor.\n",
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printk("Detected %lu.%03lu MHz processor.\n",
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz / 1000,
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(unsigned long)cpu_khz % 1000);
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(unsigned long)cpu_khz % 1000);
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@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev);
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#define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
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#define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
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#define VSA_VR_SIGNATURE 0x0003
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#define VSA_VR_SIGNATURE 0x0003
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#define VSA_VR_MEM_SIZE 0x0200
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#define VSA_VR_MEM_SIZE 0x0200
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#define VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
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#define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
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#define GSW_VSA_SIG 0x534d /* General Software signature */
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/* GPIO */
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/* GPIO */
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#define GPIO_OUTPUT_VAL 0x00
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#define GPIO_OUTPUT_VAL 0x00
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@@ -14,7 +14,8 @@
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#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
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#define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
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#ifdef CONFIG_X86_PAE
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#ifdef CONFIG_X86_PAE
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#define __PHYSICAL_MASK_SHIFT 36
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/* 44=32+12, the limit we can fit into an unsigned long pfn */
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#define __PHYSICAL_MASK_SHIFT 44
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#define __VIRTUAL_MASK_SHIFT 32
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#define __VIRTUAL_MASK_SHIFT 32
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#define PAGETABLE_LEVELS 3
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#define PAGETABLE_LEVELS 3
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