[ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.

Only System PLL clock source is selectable by CSCR_SYSTEM_SEL
bit. MPU PLL is driven by 512*CLK32 for each case.

Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Pavel Pisa
2007-03-07 23:56:16 +01:00
committed by Russell King
parent 83b84c4e8c
commit b3c6b76ffb
2 changed files with 8 additions and 7 deletions

View File

@@ -102,7 +102,7 @@ EXPORT_SYMBOL(imx_gpio_mode);
* f = 2 * f_ref * --------------------
* pd + 1
*/
static unsigned int imx_decode_pll(unsigned int pll)
static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
{
unsigned long long ll;
unsigned long quot;
@@ -111,7 +111,6 @@ static unsigned int imx_decode_pll(unsigned int pll)
u32 mfn = pll & 0x3ff;
u32 mfd = (pll >> 16) & 0x3ff;
u32 pd = (pll >> 26) & 0xf;
u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
mfi = mfi <= 5 ? 5 : mfi;
@@ -124,13 +123,15 @@ static unsigned int imx_decode_pll(unsigned int pll)
unsigned int imx_get_system_clk(void)
{
return imx_decode_pll(SPCTL0);
u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
return imx_decode_pll(SPCTL0, f_ref);
}
EXPORT_SYMBOL(imx_get_system_clk);
unsigned int imx_get_mcu_clk(void)
{
return imx_decode_pll(MPCTL0);
return imx_decode_pll(MPCTL0, CLK32 * 512);
}
EXPORT_SYMBOL(imx_get_mcu_clk);