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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

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Pull ARM SoC platform changes from Olof Johansson:
 "This branch contains mostly additions and changes to platform
  enablement and SoC-level drivers.  Since there's sometimes a
  dependency on device-tree changes, there's also a fair amount of
  those in this branch.

  Pieces worth mentioning are:

   - Mbus driver for Marvell platforms, allowing kernel configuration
     and resource allocation of on-chip peripherals.
   - Enablement of the mbus infrastructure from Marvell PCI-e drivers.
   - Preparation of MSI support for Marvell platforms.
   - Addition of new PCI-e host controller driver for Tegra platforms
   - Some churn caused by sharing of macro names between i.MX 6Q and 6DL
     platforms in the device tree sources and header files.
   - Various suspend/PM updates for Tegra, including LP1 support.
   - Versatile Express support for MCPM, part of big little support.
   - Allwinner platform support for A20 and A31 SoCs (dual and quad
     Cortex-A7)
   - OMAP2+ support for DRA7, a new Cortex-A15-based SoC.

  The code that touches other architectures are patches moving MSI
  arch-specific functions over to weak symbols and removal of
  ARCH_SUPPORTS_MSI, acked by PCI maintainers"

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits)
  tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE
  PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource
  ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list
  ARM: dts: vf610-twr: enable i2c0 device
  ARM: dts: i.MX51: Add one more I2C2 pinmux entry
  ARM: dts: i.MX51: Move pins configuration under "iomuxc" label
  ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog
  ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator
  ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX
  ARM: dts: i.MX27: Disable AUDMUX in the template
  ARM: dts: wandboard: Add support for SDIO bcm4329
  ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template
  ARM: dts: imx53-qsb: Make USBH1 functional
  ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module
  ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module
  ARM: dts: imx6qdl-sabresd: Add touchscreen support
  ARM: imx: add ocram clock for imx53
  ARM: dts: imx: ocram size is different between imx6q and imx6dl
  ARM: dts: imx27-phytec-phycore-som: Fix regulator settings
  ARM: dts: i.MX27: Remove clock name from CPU node
  ...
This commit is contained in:
Linus Torvalds
2013-09-06 13:30:06 -07:00
parent dccfd1e439 f97c43bbdf
commit b4b50fd78b
288 changed files with 12556 additions and 6434 deletions
Download Patch File Download Diff File Expand all files Collapse all files

72
drivers/memory/mvebu-devbus.c
View File

@@ -44,14 +44,6 @@
#define READ_PARAM_OFFSET 0x0
#define WRITE_PARAM_OFFSET 0x4
static const char * const devbus_wins[] = {
"devbus-boot",
"devbus-cs0",
"devbus-cs1",
"devbus-cs2",
"devbus-cs3",
};
struct devbus_read_params {
u32 bus_width;
u32 badr_skew;
@@ -208,16 +200,11 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *node = pdev->dev.of_node;
struct device_node *parent;
struct devbus *devbus;
struct resource *res;
struct clk *clk;
unsigned long rate;
const __be32 *ranges;
int err, cs;
int addr_cells, p_addr_cells, size_cells;
int ranges_len, tuple_len;
u32 base, size;
int err;
devbus = devm_kzalloc(&pdev->dev, sizeof(struct devbus), GFP_KERNEL);
if (!devbus)
@@ -247,69 +234,14 @@ static int mvebu_devbus_probe(struct platform_device *pdev)
if (err < 0)
return err;
/*
* Allocate an address window for this device.
* If the device probing fails, then we won't be able to
* remove the allocated address decoding window.
*
* FIXME: This is only a temporary hack! We need to do this here
* because we still don't have device tree bindings for mbus.
* Once that support is added, we will declare these address windows
* statically in the device tree, and remove the window configuration
* from here.
*/
/*
* Get the CS to choose the window string.
* This is a bit hacky, but it will be removed once the
* address windows are declared in the device tree.
*/
cs = (((unsigned long)devbus->base) % 0x400) / 8;
/*
* Parse 'ranges' property to obtain a (base,size) window tuple.
* This will be removed once the address windows
* are declared in the device tree.
*/
parent = of_get_parent(node);
if (!parent)
return -EINVAL;
p_addr_cells = of_n_addr_cells(parent);
of_node_put(parent);
addr_cells = of_n_addr_cells(node);
size_cells = of_n_size_cells(node);
tuple_len = (p_addr_cells + addr_cells + size_cells) * sizeof(__be32);
ranges = of_get_property(node, "ranges", &ranges_len);
if (ranges == NULL || ranges_len != tuple_len)
return -EINVAL;
base = of_translate_address(node, ranges + addr_cells);
if (base == OF_BAD_ADDR)
return -EINVAL;
size = of_read_number(ranges + addr_cells + p_addr_cells, size_cells);
/*
* Create an mbus address windows.
* FIXME: Remove this, together with the above code, once the
* address windows are declared in the device tree.
*/
err = mvebu_mbus_add_window(devbus_wins[cs], base, size);
if (err < 0)
return err;
/*
* We need to create a child device explicitly from here to
* guarantee that the child will be probed after the timing
* parameters for the bus are written.
*/
err = of_platform_populate(node, NULL, NULL, dev);
if (err < 0) {
mvebu_mbus_del_window(base, size);
if (err < 0)
return err;
}
return 0;
}