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[POWERPC] Reworked interrupt numbers for OpenPIC based Freescale chips

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Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2007-07-03 02:35:35 -05:00
parent eae98266e7
commit b533f8ae79
13 changed files with 292 additions and 378 deletions
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18
arch/powerpc/boot/dts/mpc8641_hpcn.dts
View File

@@ -90,25 +90,25 @@
reg = <24520 20>;
phy0: ethernet-phy@0 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
interrupts = <a 1>;
reg = <0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
interrupts = <a 1>;
reg = <1>;
device_type = "ethernet-phy";
};
phy2: ethernet-phy@2 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
interrupts = <a 1>;
reg = <2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
interrupt-parent = <&mpic>;
interrupts = <4a 1>;
interrupts = <a 1>;
reg = <3>;
device_type = "ethernet-phy";
};
@@ -356,7 +356,7 @@
#interrupt-cells = <2>;
built-in;
compatible = "chrp,iic";
interrupts = <49 2>;
interrupts = <9 2>;
interrupt-parent =
<&mpic>;
};
@@ -411,10 +411,10 @@
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0000 0 0 1 &mpic 44 1
0000 0 0 2 &mpic 45 1
0000 0 0 3 &mpic 46 1
0000 0 0 4 &mpic 47 1
0000 0 0 1 &mpic 4 1
0000 0 0 2 &mpic 5 1
0000 0 0 3 &mpic 6 1
0000 0 0 4 &mpic 7 1
>;
};