[POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boards
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
@@ -107,220 +107,25 @@ mpc86xx_hpcn_init_irq(void)
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}
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#ifdef CONFIG_PCI
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extern int uses_fsl_uli_m1575;
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extern int uli_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn);
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enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH};
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const unsigned char uli1575_irq_route_table[16] = {
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0, /* 0: Reserved */
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0x8, /* 1: 0b1000 */
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0, /* 2: Reserved */
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0x2, /* 3: 0b0010 */
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0x4, /* 4: 0b0100 */
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0x5, /* 5: 0b0101 */
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0x7, /* 6: 0b0111 */
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0x6, /* 7: 0b0110 */
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0, /* 8: Reserved */
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0x1, /* 9: 0b0001 */
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0x3, /* 10: 0b0011 */
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0x9, /* 11: 0b1001 */
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0xb, /* 12: 0b1011 */
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0, /* 13: Reserved */
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0xd, /* 14, 0b1101 */
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0xf, /* 15, 0b1111 */
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};
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static int __devinit
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get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin)
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static int mpc86xx_exclude_device(struct pci_controller *hose,
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u_char bus, u_char devfn)
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{
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struct of_irq oirq;
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u32 laddr[3];
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struct device_node *hosenode = hose ? hose->arch_data : NULL;
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struct device_node* node;
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struct resource rsrc;
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if (!hosenode) return -EINVAL;
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node = (struct device_node *)hose->arch_data;
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of_address_to_resource(node, 0, &rsrc);
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laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8);
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laddr[1] = laddr[2] = 0;
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of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
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DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n",
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laddr[0], slot, pin, oirq.specifier[0]);
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return oirq.specifier[0];
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}
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static void __devinit quirk_uli1575(struct pci_dev *dev)
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{
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unsigned short temp;
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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unsigned char irq2pin[16], c;
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unsigned long pirq_map_word = 0;
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u32 irq;
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int i;
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/*
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* ULI1575 interrupts route setup
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*/
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memset(irq2pin, 0, 16); /* Initialize default value 0 */
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/*
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* PIRQA -> PIRQD mapping read from OF-tree
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*
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* interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
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* PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
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*/
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for (i = 0; i < 4; i++){
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irq = get_pci_irq_from_of(hose, 17, i + 1);
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if (irq > 0 && irq < 16)
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irq2pin[irq] = PIRQA + i;
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else
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printk(KERN_WARNING "ULI1575 device"
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"(slot %d, pin %d) irq %d is invalid.\n",
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17, i, irq);
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if ((rsrc.start & 0xfffff) == 0x8000) {
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return uli_exclude_device(hose, bus, devfn);
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}
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/*
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* PIRQE -> PIRQF mapping set manually
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*
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* IRQ pin IRQ#
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* PIRQE ---- 9
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* PIRQF ---- 10
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* PIRQG ---- 11
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* PIRQH ---- 12
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*/
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for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i;
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/* Set IRQ-PIRQ Mapping to ULI1575 */
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for (i = 0; i < 16; i++)
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if (irq2pin[i])
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pirq_map_word |= (uli1575_irq_route_table[i] & 0xf)
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<< ((irq2pin[i] - PIRQA) * 4);
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/* ULI1575 IRQ mapping conf register default value is 0xb9317542 */
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DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n",
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pirq_map_word);
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pci_write_config_dword(dev, 0x48, pirq_map_word);
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#define ULI1575_SET_DEV_IRQ(slot, pin, reg) \
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do { \
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int irq; \
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irq = get_pci_irq_from_of(hose, slot, pin); \
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if (irq > 0 && irq < 16) \
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pci_write_config_byte(dev, reg, irq2pin[irq]); \
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else \
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printk(KERN_WARNING "ULI1575 device" \
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"(slot %d, pin %d) irq %d is invalid.\n", \
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slot, pin, irq); \
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} while(0)
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/* USB 1.1 OHCI controller 1, slot 28, pin 1 */
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ULI1575_SET_DEV_IRQ(28, 1, 0x86);
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/* USB 1.1 OHCI controller 2, slot 28, pin 2 */
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ULI1575_SET_DEV_IRQ(28, 2, 0x87);
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/* USB 1.1 OHCI controller 3, slot 28, pin 3 */
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ULI1575_SET_DEV_IRQ(28, 3, 0x88);
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/* USB 2.0 controller, slot 28, pin 4 */
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irq = get_pci_irq_from_of(hose, 28, 4);
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if (irq >= 0 && irq <=15)
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pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]);
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/* Audio controller, slot 29, pin 1 */
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ULI1575_SET_DEV_IRQ(29, 1, 0x8a);
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/* Modem controller, slot 29, pin 2 */
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ULI1575_SET_DEV_IRQ(29, 2, 0x8b);
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/* HD audio controller, slot 29, pin 3 */
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ULI1575_SET_DEV_IRQ(29, 3, 0x8c);
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/* SMB interrupt: slot 30, pin 1 */
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ULI1575_SET_DEV_IRQ(30, 1, 0x8e);
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/* PMU ACPI SCI interrupt: slot 30, pin 2 */
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ULI1575_SET_DEV_IRQ(30, 2, 0x8f);
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/* Serial ATA interrupt: slot 31, pin 1 */
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ULI1575_SET_DEV_IRQ(31, 1, 0x8d);
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/* Primary PATA IDE IRQ: 14
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* Secondary PATA IDE IRQ: 15
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*/
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pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]);
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pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]);
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/* Set IRQ14 and IRQ15 to legacy IRQs */
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pci_read_config_word(dev, 0x46, &temp);
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temp |= 0xc000;
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pci_write_config_word(dev, 0x46, temp);
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/* Set i8259 interrupt trigger
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* IRQ 3: Level
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* IRQ 4: Level
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* IRQ 5: Level
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* IRQ 6: Level
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* IRQ 7: Level
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* IRQ 9: Level
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* IRQ 10: Level
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* IRQ 11: Level
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* IRQ 12: Level
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* IRQ 14: Edge
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* IRQ 15: Edge
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*/
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outb(0xfa, 0x4d0);
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outb(0x1e, 0x4d1);
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#undef ULI1575_SET_DEV_IRQ
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/* Disable the HD interface and enable the AC97 interface. */
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pci_read_config_byte(dev, 0xb8, &c);
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c &= 0x7f;
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pci_write_config_byte(dev, 0xb8, c);
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return PCIBIOS_SUCCESSFUL;
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}
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static void __devinit quirk_uli5288(struct pci_dev *dev)
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{
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unsigned char c;
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pci_read_config_byte(dev,0x83,&c);
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c |= 0x80;
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pci_write_config_byte(dev, 0x83, c);
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pci_write_config_byte(dev, 0x09, 0x01);
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pci_write_config_byte(dev, 0x0a, 0x06);
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pci_read_config_byte(dev,0x83,&c);
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c &= 0x7f;
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pci_write_config_byte(dev, 0x83, c);
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pci_read_config_byte(dev,0x84,&c);
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c |= 0x01;
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pci_write_config_byte(dev, 0x84, c);
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}
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static void __devinit quirk_uli5229(struct pci_dev *dev)
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{
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unsigned short temp;
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pci_write_config_word(dev, 0x04, 0x0405);
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dev->class &= ~0x5;
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pci_read_config_word(dev, 0x4a, &temp);
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temp |= 0x1000;
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pci_write_config_word(dev, 0x4a, temp);
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}
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static void __devinit early_uli5249(struct pci_dev *dev)
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{
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unsigned char temp;
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pci_write_config_word(dev, 0x04, 0x0007);
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pci_read_config_byte(dev, 0x7c, &temp);
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pci_write_config_byte(dev, 0x7c, 0x80);
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pci_write_config_byte(dev, 0x09, 0x01);
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pci_write_config_byte(dev, 0x7c, temp);
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dev->class |= 0x1;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
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#endif /* CONFIG_PCI */
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@@ -353,6 +158,9 @@ mpc86xx_hpcn_setup_arch(void)
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else
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fsl_add_bridge(np, 0);
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}
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uses_fsl_uli_m1575 = 1;
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ppc_md.pci_exclude_device = mpc86xx_exclude_device;
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#endif
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printk("MPC86xx HPCN board from Freescale Semiconductor\n");
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