lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

clk: exynos5250: Fix incorrect placement of __initdata

Browse Source 
__initdata should be placed between the variable name and equal
sign for the variable to be placed in the intended section.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Sachin Kamat
2013-08-07 10:18:38 +05:30
committed by Mike Turquette
parent 3c701c51ef
commit b6993ecb87
1 changed files with 5 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/clk/samsung/clk-exynos5250.c
View File

@@ -132,7 +132,7 @@ enum exynos5250_clks {
* list of controller registers to be saved and restored during a * list of controller registers to be saved and restored during a
* suspend/resume cycle. * suspend/resume cycle.
*/ */
static __initdata unsigned long exynos5250_clk_regs[] = { static unsigned long exynos5250_clk_regs[] __initdata = {
SRC_CPU, SRC_CPU,
DIV_CPU0, DIV_CPU0,
SRC_CORE1, SRC_CORE1,
@@ -494,7 +494,7 @@ static struct samsung_gate_clock exynos5250_gate_clks[] __initdata = {
GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0), GATE(g2d, "g2d", "aclk200", GATE_IP_ACP, 3, 0, 0),
}; };
static __initdata struct samsung_pll_rate_table vpll_24mhz_tbl[] = { static struct samsung_pll_rate_table vpll_24mhz_tbl[] __initdata = {
/* sorted in descending order */ /* sorted in descending order */
/* PLL_36XX_RATE(rate, m, p, s, k) */ /* PLL_36XX_RATE(rate, m, p, s, k) */
PLL_36XX_RATE(266000000, 266, 3, 3, 0), PLL_36XX_RATE(266000000, 266, 3, 3, 0),
@@ -503,7 +503,7 @@ static __initdata struct samsung_pll_rate_table vpll_24mhz_tbl[] = {
{ }, { },
}; };
static __initdata struct samsung_pll_rate_table epll_24mhz_tbl[] = { static struct samsung_pll_rate_table epll_24mhz_tbl[] __initdata = {
/* sorted in descending order */ /* sorted in descending order */
/* PLL_36XX_RATE(rate, m, p, s, k) */ /* PLL_36XX_RATE(rate, m, p, s, k) */
PLL_36XX_RATE(192000000, 64, 2, 2, 0), PLL_36XX_RATE(192000000, 64, 2, 2, 0),
@@ -517,7 +517,7 @@ static __initdata struct samsung_pll_rate_table epll_24mhz_tbl[] = {
{ }, { },
}; };
static struct __initdata samsung_pll_clock exynos5250_plls[nr_plls] = { static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = {
[apll] = PLL_A(pll_35xx, fout_apll, "fout_apll", "fin_pll", APLL_LOCK, [apll] = PLL_A(pll_35xx, fout_apll, "fout_apll", "fin_pll", APLL_LOCK,
APLL_CON0, "fout_apll", NULL), APLL_CON0, "fout_apll", NULL),
[mpll] = PLL_A(pll_35xx, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK, [mpll] = PLL_A(pll_35xx, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK,
@@ -534,7 +534,7 @@ static struct __initdata samsung_pll_clock exynos5250_plls[nr_plls] = {
VPLL_LOCK, VPLL_CON0, NULL), VPLL_LOCK, VPLL_CON0, NULL),
}; };
static __initdata struct of_device_id ext_clk_match[] = { static struct of_device_id ext_clk_match[] __initdata = {
{ .compatible = "samsung,clock-xxti", .data = (void *)0, }, { .compatible = "samsung,clock-xxti", .data = (void *)0, },
{ }, { },
}; };