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[MTD] [NAND] FSL-UPM: add multi chip support

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This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. This requires support for multiple GPIOs for the RNB pins.
The NAND chips are selected through address lines defined by the
FDT property "fsl,upm-addr-line-cs-offsets".

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
This commit is contained in:
Wolfgang Grandegger
2009-03-30 12:02:42 +02:00
committed by David Woodhouse
parent db99a55231
commit b6e0e8c077
2 changed files with 77 additions and 24 deletions
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2
arch/powerpc/sysdev/fsl_lbc.c
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@ -150,7 +150,7 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
spin_lock_irqsave(&fsl_lbc_lock, flags);
out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
out_be32(&fsl_lbc_regs->mar, mar);
switch (upm->width) {
case 8: