[PATCH] ARM: Convert ARM timer implementations to use readl/writel
Convert ARMs timer implementations to use readl/writel instead of accessing the registers via a struct. People have recently asked if accessing timers via a structure is the "right way" and its not the Linux way. So fix this code to conform to "The Linux Way"(tm). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Catalin Marinas <catalin.marinas@arm.com>
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committed by
Russell King
parent
6904b2465c
commit
b720f73296
@@ -20,6 +20,7 @@
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/hardware/amba.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/arch/cm.h>
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#include <asm/system.h>
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#include <asm/leds.h>
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@@ -156,16 +157,6 @@ EXPORT_SYMBOL(cm_control);
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#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
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#endif
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/*
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* What does it look like?
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*/
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typedef struct TimerStruct {
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unsigned long TimerLoad;
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unsigned long TimerValue;
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unsigned long TimerControl;
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unsigned long TimerClear;
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} TimerStruct_t;
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static unsigned long timer_reload;
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/*
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@@ -174,7 +165,6 @@ static unsigned long timer_reload;
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*/
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unsigned long integrator_gettimeoffset(void)
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{
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volatile TimerStruct_t *timer1 = (TimerStruct_t *)TIMER1_VA_BASE;
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unsigned long ticks1, ticks2, status;
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/*
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@@ -183,11 +173,11 @@ unsigned long integrator_gettimeoffset(void)
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* an interrupt. We get around this by ensuring that the
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* counter has not reloaded between our two reads.
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*/
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ticks2 = timer1->TimerValue & 0xffff;
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ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
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do {
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ticks1 = ticks2;
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status = __raw_readl(VA_IC_BASE + IRQ_RAW_STATUS);
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ticks2 = timer1->TimerValue & 0xffff;
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ticks2 = readl(TIMER1_VA_BASE + TIMER_VALUE) & 0xffff;
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} while (ticks2 > ticks1);
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/*
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@@ -213,20 +203,19 @@ unsigned long integrator_gettimeoffset(void)
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static irqreturn_t
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integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
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write_seqlock(&xtime_lock);
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/*
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* clear the interrupt
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*/
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timer1->TimerClear = 1;
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writel(1, TIMER1_VA_BASE + TIMER_INTCLR);
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/*
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* the clock tick routines are only processed on the
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* primary CPU
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*/
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if (hard_smp_processor_id() == 0) {
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nmi_tick();
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timer_tick(regs);
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#ifdef CONFIG_SMP
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smp_send_timer();
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@@ -256,32 +245,29 @@ static struct irqaction integrator_timer_irq = {
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*/
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void __init integrator_time_init(unsigned long reload, unsigned int ctrl)
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{
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volatile TimerStruct_t *timer0 = (volatile TimerStruct_t *)TIMER0_VA_BASE;
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volatile TimerStruct_t *timer1 = (volatile TimerStruct_t *)TIMER1_VA_BASE;
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volatile TimerStruct_t *timer2 = (volatile TimerStruct_t *)TIMER2_VA_BASE;
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unsigned int timer_ctrl = 0x80 | 0x40; /* periodic */
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unsigned int timer_ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
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timer_reload = reload;
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timer_ctrl |= ctrl;
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if (timer_reload > 0x100000) {
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timer_reload >>= 8;
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timer_ctrl |= 0x08; /* /256 */
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timer_ctrl |= TIMER_CTRL_DIV256;
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} else if (timer_reload > 0x010000) {
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timer_reload >>= 4;
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timer_ctrl |= 0x04; /* /16 */
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timer_ctrl |= TIMER_CTRL_DIV16;
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}
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/*
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* Initialise to a known state (all timers off)
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*/
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timer0->TimerControl = 0;
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timer1->TimerControl = 0;
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timer2->TimerControl = 0;
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writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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writel(0, TIMER1_VA_BASE + TIMER_CTRL);
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writel(0, TIMER2_VA_BASE + TIMER_CTRL);
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timer1->TimerLoad = timer_reload;
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timer1->TimerValue = timer_reload;
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timer1->TimerControl = timer_ctrl;
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writel(timer_reload, TIMER1_VA_BASE + TIMER_LOAD);
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writel(timer_reload, TIMER1_VA_BASE + TIMER_VALUE);
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writel(timer_ctrl, TIMER1_VA_BASE + TIMER_CTRL);
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/*
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* Make irqs happen for the system timer
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