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MIPS: Lemote 2F: Ensure atomic execution of _rdmsr and _wrmsr

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On Lemote 2F CS5536 MSRs are accessed through a index / data register pair.
The access sequence must be protected by a spinlock to be atomic.

Without this rebooting in fs2f_reboot() may fail.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1058/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Wu Zhangjin
2010-03-11 11:30:50 +08:00
committed by Ralf Baechle
parent 5255366403
commit b846c10da5
1 changed files with 10 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
arch/mips/pci/ops-loongson2.c
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@@ -180,15 +180,21 @@ struct pci_ops loongson_pci_ops = {
}; };
#ifdef CONFIG_CS5536 #ifdef CONFIG_CS5536
DEFINE_RAW_SPINLOCK(msr_lock);
void _rdmsr(u32 msr, u32 *hi, u32 *lo) void _rdmsr(u32 msr, u32 *hi, u32 *lo)
{ {
struct pci_bus bus = { struct pci_bus bus = {
.number = PCI_BUS_CS5536 .number = PCI_BUS_CS5536
}; };
u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
unsigned long flags;
raw_spin_lock_irqsave(&msr_lock, flags);
loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
raw_spin_unlock_irqrestore(&msr_lock, flags);
} }
EXPORT_SYMBOL(_rdmsr); EXPORT_SYMBOL(_rdmsr);
@@ -198,9 +204,13 @@ void _wrmsr(u32 msr, u32 hi, u32 lo)
.number = PCI_BUS_CS5536 .number = PCI_BUS_CS5536
}; };
u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0);
unsigned long flags;
raw_spin_lock_irqsave(&msr_lock, flags);
loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr);
loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo);
loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi);
raw_spin_unlock_irqrestore(&msr_lock, flags);
} }
EXPORT_SYMBOL(_wrmsr); EXPORT_SYMBOL(_wrmsr);
#endif #endif