ARM: OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in bootloader
Resetting DISPC when a DISPC output is enabled causes the DSS to go into an inconsistent state. Thus if the bootloader has enabled a display, the hwmod code cannot reset the DISPC module just like that, but the outputs need to be disabled first. Add function dispc_disable_outputs() which disables all active overlay manager and ensure all frame transfers are completed. Modify omap_dss_reset() to call this function and clear DSS_CONTROL, DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the DSS2 driver starts. This resolves the hang issue(caused by a L3 error during boot) seen on the beagle board C3, which has a factory bootloader that enables display. The issue is resolved with this patch. Thanks to Tomi and Sricharan for some additional testing. Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: R, Sricharan <r.sricharan@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> [paul@pwsan.com: restructured code, removed omap_{read,write}l(), removed cpu_is_omap*() calls and converted to dev_attr] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley
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13662dc5b1
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b923d40dd4
@ -1327,6 +1327,11 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
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{ }
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};
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static struct omap_dss_dispc_dev_attr omap44xx_dss_dispc_dev_attr = {
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.manager_count = 3,
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.has_framedonetv_irq = 1
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};
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/* l4_per -> dss_dispc */
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static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
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.master = &omap44xx_l4_per_hwmod,
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@ -1357,6 +1362,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
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},
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.slaves = omap44xx_dss_dispc_slaves,
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.slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
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.dev_attr = &omap44xx_dss_dispc_dev_attr
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};
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/*
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