x86/pci: update pirq_enable_irq() to setup io apic routing
So we can set io apic routing only when enabling the device irq. This is advantageous for IRQ descriptor allocation affinity: if we set up the IO-APIC entry later, we have a chance to allocate the IRQ descriptor later and know which device it is on and can set affinity accordingly. [ Impact: standardize/enhance irq-enabling sequence for mptable irqs ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: Len Brown <lenb@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <4A01C46E.8000501@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@@ -889,6 +889,9 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
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return 0;
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}
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if (io_apic_assign_pci_irqs)
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return 0;
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/* Find IRQ routing entry */
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if (!pirq_table)
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@@ -1039,63 +1042,15 @@ static void __init pcibios_fixup_irqs(void)
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pirq_penalty[dev->irq]++;
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}
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if (io_apic_assign_pci_irqs)
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return;
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dev = NULL;
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while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
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pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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if (!pin)
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continue;
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#ifdef CONFIG_X86_IO_APIC
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/*
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* Recalculate IRQ numbers if we use the I/O APIC.
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*/
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if (io_apic_assign_pci_irqs) {
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int irq;
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int ioapic = -1, ioapic_pin = -1;
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int triggering, polarity;
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/*
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* interrupt pins are numbered starting from 1
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*/
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irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
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PCI_SLOT(dev->devfn), pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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/*
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* Busses behind bridges are typically not listed in the
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* MP-table. In this case we have to look up the IRQ
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* based on the parent bus, parent slot, and pin number.
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* The SMP code detects such bridged busses itself so we
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* should get into this branch reliably.
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*/
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if (irq < 0 && dev->bus->parent) {
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/* go back to the bridge */
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struct pci_dev *bridge = dev->bus->self;
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int bus;
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pin = pci_swizzle_interrupt_pin(dev, pin);
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bus = bridge->bus->number;
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irq = IO_APIC_get_PCI_irq_vector(bus,
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PCI_SLOT(bridge->devfn),
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pin - 1,
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&ioapic, &ioapic_pin,
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&triggering, &polarity);
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if (irq >= 0)
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dev_warn(&dev->dev,
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"using bridge %s INT %c to "
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"get IRQ %d\n",
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pci_name(bridge),
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'A' + pin - 1, irq);
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}
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if (irq >= 0) {
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dev_info(&dev->dev,
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"PCI->APIC IRQ transform: INT %c "
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"-> IRQ %d\n",
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'A' + pin - 1, irq);
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dev->irq = irq;
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}
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}
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#endif
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/*
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* Still no IRQ? Try to lookup one...
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*/
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@@ -1190,6 +1145,19 @@ int __init pcibios_irq_init(void)
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pcibios_enable_irq = pirq_enable_irq;
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pcibios_fixup_irqs();
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if (io_apic_assign_pci_irqs && pci_routeirq) {
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struct pci_dev *dev = NULL;
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/*
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* PCI IRQ routing is set up by pci_enable_device(), but we
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* also do it here in case there are still broken drivers that
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* don't use pci_enable_device().
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*/
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printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
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for_each_pci_dev(dev)
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pirq_enable_irq(dev);
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}
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return 0;
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}
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@@ -1220,13 +1188,17 @@ void pcibios_penalize_isa_irq(int irq, int active)
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static int pirq_enable_irq(struct pci_dev *dev)
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{
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u8 pin;
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struct pci_dev *temp_dev;
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pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
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if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
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if (pin && !pcibios_lookup_irq(dev, 1)) {
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char *msg = "";
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if (!io_apic_assign_pci_irqs && dev->irq)
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return 0;
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if (io_apic_assign_pci_irqs) {
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#ifdef CONFIG_X86_IO_APIC
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struct pci_dev *temp_dev;
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int irq;
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int ioapic = -1, ioapic_pin = -1;
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int triggering, polarity;
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@@ -1261,12 +1233,16 @@ static int pirq_enable_irq(struct pci_dev *dev)
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}
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dev = temp_dev;
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if (irq >= 0) {
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io_apic_set_pci_routing(&dev->dev, ioapic,
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ioapic_pin, irq,
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triggering, polarity);
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dev->irq = irq;
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dev_info(&dev->dev, "PCI->APIC IRQ transform: "
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"INT %c -> IRQ %d\n", 'A' + pin - 1, irq);
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dev->irq = irq;
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return 0;
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} else
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msg = "; probably buggy MP table";
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#endif
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} else if (pci_probe & PCI_BIOS_IRQ_SCAN)
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msg = "";
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else
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