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USB: ehci_fsl update for MPC831x support

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For MPC831x support, change the ehci-fsl driver to preserve
bits set in platform code.  Add a common CONFIG_USB_EHCI_FSL
to indicate presence of Freescale EHCI SOC.  Add FSL_USB2_DR_OTG
operating mode support, thus both host and device can work for the
mini-ab receptacle.  Note: this doesn't enable OTG protocol
support.

Signed-off-by: Li Yang <leoli@freescale.com>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Li Yang
2007-05-11 17:09:55 +08:00
committed by Greg Kroah-Hartman
parent 4d68c0be69
commit ba02978a48
3 changed files with 15 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/usb/host/Kconfig
View File

@@ -77,6 +77,13 @@ config USB_EHCI_BIG_ENDIAN_DESC
depends on USB_EHCI_HCD && 440EPX depends on USB_EHCI_HCD && 440EPX
default y default y
config USB_EHCI_FSL
bool
select USB_EHCI_ROOT_HUB_TT
default y if MPC834x || PPC_MPC831x
---help---
Variation of ARC USB block used in some Freescale chips.
config USB_ISP116X_HCD config USB_ISP116X_HCD
tristate "ISP116X HCD support" tristate "ISP116X HCD support"
depends on USB depends on USB

10
drivers/usb/host/ehci-fsl.c
View File

@@ -67,7 +67,8 @@ int usb_hcd_fsl_probe(const struct hc_driver *driver,
* in host mode. * in host mode.
*/ */
if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_MPH_HOST))) { (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))) {
dev_err(&pdev->dev, dev_err(&pdev->dev,
"Non Host Mode configured for %s. Wrong driver linked.\n", "Non Host Mode configured for %s. Wrong driver linked.\n",
pdev->dev.bus_id); pdev->dev.bus_id);
@@ -185,12 +186,14 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
struct ehci_hcd *ehci = hcd_to_ehci(hcd); struct ehci_hcd *ehci = hcd_to_ehci(hcd);
struct fsl_usb2_platform_data *pdata; struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs; void __iomem *non_ehci = hcd->regs;
u32 temp;
pdata = pdata =
(struct fsl_usb2_platform_data *)hcd->self.controller-> (struct fsl_usb2_platform_data *)hcd->self.controller->
platform_data; platform_data;
/* Enable PHY interface in the control reg. */ /* Enable PHY interface in the control reg. */
out_be32(non_ehci + FSL_SOC_USB_CTRL, 0x00000004); temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b); out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0000001b);
#if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE) #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
@@ -206,7 +209,8 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
#endif #endif
if (pdata->operating_mode == FSL_USB2_DR_HOST) if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
mpc83xx_setup_phy(ehci, pdata->phy_mode, 0); mpc83xx_setup_phy(ehci, pdata->phy_mode, 0);
if (pdata->operating_mode == FSL_USB2_MPH_HOST) { if (pdata->operating_mode == FSL_USB2_MPH_HOST) {

2
drivers/usb/host/ehci-hcd.c
View File

@@ -994,7 +994,7 @@ MODULE_LICENSE ("GPL");
#define PCI_DRIVER ehci_pci_driver #define PCI_DRIVER ehci_pci_driver
#endif #endif
#ifdef CONFIG_MPC834x #ifdef CONFIG_USB_EHCI_FSL
#include "ehci-fsl.c" #include "ehci-fsl.c"
#define PLATFORM_DRIVER ehci_fsl_driver #define PLATFORM_DRIVER ehci_fsl_driver
#endif #endif