[media] media: vb2: dma contig allocator: use dma_addr instread of paddr
Use the correct 'dma_addr' name for the buffer address. 'paddr' suggested that this is the physical address in system memory. For most ARM platforms these two are the same, but this is not a generic rule. 'dma_addr' will also point better to dma-mapping api. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Pawel Osciak <pawel@osciak.com> Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
committed by
Mauro Carvalho Chehab
parent
035aa1475d
commit
ba7fcb0c95
@@ -341,7 +341,7 @@ static int buffer_prepare(struct vb2_buffer *vb)
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/* Initialize the dma descriptor */
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/* Initialize the dma descriptor */
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desc->p_fbd->fb_address =
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desc->p_fbd->fb_address =
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vb2_dma_contig_plane_paddr(vb, 0);
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vb2_dma_contig_plane_dma_addr(vb, 0);
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desc->p_fbd->next_fbd_address = 0;
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desc->p_fbd->next_fbd_address = 0;
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set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
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set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
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@@ -450,7 +450,7 @@ static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
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buf = cam->vb_bufs[frame ^ 0x1];
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buf = cam->vb_bufs[frame ^ 0x1];
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cam->vb_bufs[frame] = buf;
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cam->vb_bufs[frame] = buf;
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mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
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mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
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vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
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vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
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set_bit(CF_SINGLE_BUFFER, &cam->flags);
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set_bit(CF_SINGLE_BUFFER, &cam->flags);
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singles++;
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singles++;
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return;
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return;
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@@ -461,7 +461,7 @@ static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
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buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
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buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
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list_del_init(&buf->queue);
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list_del_init(&buf->queue);
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mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
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mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
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vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
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vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
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cam->vb_bufs[frame] = buf;
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cam->vb_bufs[frame] = buf;
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clear_bit(CF_SINGLE_BUFFER, &cam->flags);
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clear_bit(CF_SINGLE_BUFFER, &cam->flags);
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}
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}
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@@ -247,7 +247,7 @@ static int mx3_videobuf_prepare(struct vb2_buffer *vb)
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}
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}
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if (buf->state == CSI_BUF_NEEDS_INIT) {
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if (buf->state == CSI_BUF_NEEDS_INIT) {
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sg_dma_address(sg) = vb2_dma_contig_plane_paddr(vb, 0);
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sg_dma_address(sg) = vb2_dma_contig_plane_dma_addr(vb, 0);
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sg_dma_len(sg) = new_size;
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sg_dma_len(sg) = new_size;
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buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
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buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
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@@ -457,7 +457,7 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,
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dbg("memplanes= %d, colplanes= %d, pix_size= %d",
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dbg("memplanes= %d, colplanes= %d, pix_size= %d",
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frame->fmt->memplanes, frame->fmt->colplanes, pix_size);
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frame->fmt->memplanes, frame->fmt->colplanes, pix_size);
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paddr->y = vb2_dma_contig_plane_paddr(vb, 0);
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paddr->y = vb2_dma_contig_plane_dma_addr(vb, 0);
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if (frame->fmt->memplanes == 1) {
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if (frame->fmt->memplanes == 1) {
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switch (frame->fmt->colplanes) {
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switch (frame->fmt->colplanes) {
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@@ -485,10 +485,10 @@ int fimc_prepare_addr(struct fimc_ctx *ctx, struct vb2_buffer *vb,
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}
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}
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} else {
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} else {
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if (frame->fmt->memplanes >= 2)
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if (frame->fmt->memplanes >= 2)
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paddr->cb = vb2_dma_contig_plane_paddr(vb, 1);
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paddr->cb = vb2_dma_contig_plane_dma_addr(vb, 1);
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if (frame->fmt->memplanes == 3)
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if (frame->fmt->memplanes == 3)
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paddr->cr = vb2_dma_contig_plane_paddr(vb, 2);
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paddr->cr = vb2_dma_contig_plane_dma_addr(vb, 2);
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}
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}
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dbg("PHYS_ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d",
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dbg("PHYS_ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d",
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@@ -202,7 +202,7 @@ static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx)
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appropraite flags */
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appropraite flags */
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src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
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src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
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list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
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list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
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if (vb2_dma_contig_plane_paddr(dst_buf->b, 0) == dec_y_addr) {
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if (vb2_dma_contig_plane_dma_addr(dst_buf->b, 0) == dec_y_addr) {
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memcpy(&dst_buf->b->v4l2_buf.timecode,
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memcpy(&dst_buf->b->v4l2_buf.timecode,
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&src_buf->b->v4l2_buf.timecode,
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&src_buf->b->v4l2_buf.timecode,
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sizeof(struct v4l2_timecode));
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sizeof(struct v4l2_timecode));
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@@ -248,7 +248,7 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err)
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* check which videobuf does it correspond to */
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* check which videobuf does it correspond to */
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list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
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list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
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/* Check if this is the buffer we're looking for */
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/* Check if this is the buffer we're looking for */
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if (vb2_dma_contig_plane_paddr(dst_buf->b, 0) == dspl_y_addr) {
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if (vb2_dma_contig_plane_dma_addr(dst_buf->b, 0) == dspl_y_addr) {
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list_del(&dst_buf->list);
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list_del(&dst_buf->list);
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ctx->dst_queue_cnt--;
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ctx->dst_queue_cnt--;
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dst_buf->b->v4l2_buf.sequence = ctx->sequence;
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dst_buf->b->v4l2_buf.sequence = ctx->sequence;
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@@ -824,7 +824,7 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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return 0;
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return 0;
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for (i = 0; i <= ctx->src_fmt->num_planes ; i++) {
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for (i = 0; i <= ctx->src_fmt->num_planes ; i++) {
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if (IS_ERR_OR_NULL(ERR_PTR(
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if (IS_ERR_OR_NULL(ERR_PTR(
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vb2_dma_contig_plane_paddr(vb, i)))) {
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vb2_dma_contig_plane_dma_addr(vb, i)))) {
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mfc_err("Plane mem not allocated\n");
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mfc_err("Plane mem not allocated\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@@ -837,13 +837,13 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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i = vb->v4l2_buf.index;
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i = vb->v4l2_buf.index;
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ctx->dst_bufs[i].b = vb;
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ctx->dst_bufs[i].b = vb;
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ctx->dst_bufs[i].cookie.raw.luma =
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ctx->dst_bufs[i].cookie.raw.luma =
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vb2_dma_contig_plane_paddr(vb, 0);
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vb2_dma_contig_plane_dma_addr(vb, 0);
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ctx->dst_bufs[i].cookie.raw.chroma =
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ctx->dst_bufs[i].cookie.raw.chroma =
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vb2_dma_contig_plane_paddr(vb, 1);
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vb2_dma_contig_plane_dma_addr(vb, 1);
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ctx->dst_bufs_cnt++;
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ctx->dst_bufs_cnt++;
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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if (IS_ERR_OR_NULL(ERR_PTR(
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if (IS_ERR_OR_NULL(ERR_PTR(
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vb2_dma_contig_plane_paddr(vb, 0)))) {
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vb2_dma_contig_plane_dma_addr(vb, 0)))) {
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mfc_err("Plane memory not allocated\n");
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mfc_err("Plane memory not allocated\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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@@ -855,7 +855,7 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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i = vb->v4l2_buf.index;
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i = vb->v4l2_buf.index;
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ctx->src_bufs[i].b = vb;
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ctx->src_bufs[i].b = vb;
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ctx->src_bufs[i].cookie.stream =
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ctx->src_bufs[i].cookie.stream =
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vb2_dma_contig_plane_paddr(vb, 0);
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vb2_dma_contig_plane_dma_addr(vb, 0);
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ctx->src_bufs_cnt++;
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ctx->src_bufs_cnt++;
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} else {
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} else {
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mfc_err("s5p_mfc_buf_init: unknown queue type\n");
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mfc_err("s5p_mfc_buf_init: unknown queue type\n");
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@@ -599,8 +599,8 @@ static void cleanup_ref_queue(struct s5p_mfc_ctx *ctx)
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while (!list_empty(&ctx->ref_queue)) {
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while (!list_empty(&ctx->ref_queue)) {
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mb_entry = list_entry((&ctx->ref_queue)->next,
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mb_entry = list_entry((&ctx->ref_queue)->next,
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struct s5p_mfc_buf, list);
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struct s5p_mfc_buf, list);
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mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0);
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mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
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mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1);
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mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
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list_del(&mb_entry->list);
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list_del(&mb_entry->list);
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ctx->ref_queue_cnt--;
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ctx->ref_queue_cnt--;
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list_add_tail(&mb_entry->list, &ctx->src_queue);
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list_add_tail(&mb_entry->list, &ctx->src_queue);
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@@ -622,7 +622,7 @@ static int enc_pre_seq_start(struct s5p_mfc_ctx *ctx)
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spin_lock_irqsave(&dev->irqlock, flags);
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spin_lock_irqsave(&dev->irqlock, flags);
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dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
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dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
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dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0);
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dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
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dst_size = vb2_plane_size(dst_mb->b, 0);
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dst_size = vb2_plane_size(dst_mb->b, 0);
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s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
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s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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@@ -668,14 +668,14 @@ static int enc_pre_frame_start(struct s5p_mfc_ctx *ctx)
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spin_lock_irqsave(&dev->irqlock, flags);
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spin_lock_irqsave(&dev->irqlock, flags);
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src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
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src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
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src_y_addr = vb2_dma_contig_plane_paddr(src_mb->b, 0);
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src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
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src_c_addr = vb2_dma_contig_plane_paddr(src_mb->b, 1);
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src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
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s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
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s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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spin_lock_irqsave(&dev->irqlock, flags);
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spin_lock_irqsave(&dev->irqlock, flags);
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dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
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dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
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dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0);
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dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
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dst_size = vb2_plane_size(dst_mb->b, 0);
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dst_size = vb2_plane_size(dst_mb->b, 0);
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s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
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s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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spin_unlock_irqrestore(&dev->irqlock, flags);
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@@ -703,8 +703,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
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if (slice_type >= 0) {
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if (slice_type >= 0) {
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s5p_mfc_get_enc_frame_buffer(ctx, &enc_y_addr, &enc_c_addr);
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s5p_mfc_get_enc_frame_buffer(ctx, &enc_y_addr, &enc_c_addr);
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list_for_each_entry(mb_entry, &ctx->src_queue, list) {
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list_for_each_entry(mb_entry, &ctx->src_queue, list) {
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mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0);
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mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
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mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1);
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mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
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if ((enc_y_addr == mb_y_addr) &&
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if ((enc_y_addr == mb_y_addr) &&
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(enc_c_addr == mb_c_addr)) {
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(enc_c_addr == mb_c_addr)) {
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list_del(&mb_entry->list);
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list_del(&mb_entry->list);
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@@ -715,8 +715,8 @@ static int enc_post_frame_start(struct s5p_mfc_ctx *ctx)
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}
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}
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}
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}
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list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
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list_for_each_entry(mb_entry, &ctx->ref_queue, list) {
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mb_y_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 0);
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mb_y_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 0);
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mb_c_addr = vb2_dma_contig_plane_paddr(mb_entry->b, 1);
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mb_c_addr = vb2_dma_contig_plane_dma_addr(mb_entry->b, 1);
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if ((enc_y_addr == mb_y_addr) &&
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if ((enc_y_addr == mb_y_addr) &&
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(enc_c_addr == mb_c_addr)) {
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(enc_c_addr == mb_c_addr)) {
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list_del(&mb_entry->list);
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list_del(&mb_entry->list);
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@@ -1501,13 +1501,13 @@ static int check_vb_with_fmt(struct s5p_mfc_fmt *fmt, struct vb2_buffer *vb)
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return -EINVAL;
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return -EINVAL;
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}
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}
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for (i = 0; i < fmt->num_planes; i++) {
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for (i = 0; i < fmt->num_planes; i++) {
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if (!vb2_dma_contig_plane_paddr(vb, i)) {
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if (!vb2_dma_contig_plane_dma_addr(vb, i)) {
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mfc_err("failed to get plane cookie\n");
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mfc_err("failed to get plane cookie\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx",
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mfc_debug(2, "index: %d, plane[%d] cookie: 0x%08zx",
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vb->v4l2_buf.index, i,
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vb->v4l2_buf.index, i,
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vb2_dma_contig_plane_paddr(vb, i));
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vb2_dma_contig_plane_dma_addr(vb, i));
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}
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}
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return 0;
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return 0;
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}
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}
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@@ -1584,7 +1584,7 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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i = vb->v4l2_buf.index;
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i = vb->v4l2_buf.index;
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ctx->dst_bufs[i].b = vb;
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ctx->dst_bufs[i].b = vb;
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ctx->dst_bufs[i].cookie.stream =
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ctx->dst_bufs[i].cookie.stream =
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vb2_dma_contig_plane_paddr(vb, 0);
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vb2_dma_contig_plane_dma_addr(vb, 0);
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ctx->dst_bufs_cnt++;
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ctx->dst_bufs_cnt++;
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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} else if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) {
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ret = check_vb_with_fmt(ctx->src_fmt, vb);
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ret = check_vb_with_fmt(ctx->src_fmt, vb);
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@@ -1593,9 +1593,9 @@ static int s5p_mfc_buf_init(struct vb2_buffer *vb)
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i = vb->v4l2_buf.index;
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i = vb->v4l2_buf.index;
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ctx->src_bufs[i].b = vb;
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ctx->src_bufs[i].b = vb;
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ctx->src_bufs[i].cookie.raw.luma =
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ctx->src_bufs[i].cookie.raw.luma =
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vb2_dma_contig_plane_paddr(vb, 0);
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vb2_dma_contig_plane_dma_addr(vb, 0);
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ctx->src_bufs[i].cookie.raw.chroma =
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ctx->src_bufs[i].cookie.raw.chroma =
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vb2_dma_contig_plane_paddr(vb, 1);
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vb2_dma_contig_plane_dma_addr(vb, 1);
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ctx->src_bufs_cnt++;
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ctx->src_bufs_cnt++;
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} else {
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} else {
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mfc_err("inavlid queue type: %d\n", vq->type);
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mfc_err("inavlid queue type: %d\n", vq->type);
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@@ -1135,7 +1135,7 @@ static int s5p_mfc_run_dec_frame(struct s5p_mfc_ctx *ctx, int last_frame)
|
|||||||
temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
||||||
temp_vb->used = 1;
|
temp_vb->used = 1;
|
||||||
s5p_mfc_set_dec_stream_buffer(ctx,
|
s5p_mfc_set_dec_stream_buffer(ctx,
|
||||||
vb2_dma_contig_plane_paddr(temp_vb->b, 0), ctx->consumed_stream,
|
vb2_dma_contig_plane_dma_addr(temp_vb->b, 0), ctx->consumed_stream,
|
||||||
temp_vb->b->v4l2_planes[0].bytesused);
|
temp_vb->b->v4l2_planes[0].bytesused);
|
||||||
spin_unlock_irqrestore(&dev->irqlock, flags);
|
spin_unlock_irqrestore(&dev->irqlock, flags);
|
||||||
index = temp_vb->b->v4l2_buf.index;
|
index = temp_vb->b->v4l2_buf.index;
|
||||||
@@ -1172,12 +1172,12 @@ static int s5p_mfc_run_enc_frame(struct s5p_mfc_ctx *ctx)
|
|||||||
}
|
}
|
||||||
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
src_mb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
||||||
src_mb->used = 1;
|
src_mb->used = 1;
|
||||||
src_y_addr = vb2_dma_contig_plane_paddr(src_mb->b, 0);
|
src_y_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 0);
|
||||||
src_c_addr = vb2_dma_contig_plane_paddr(src_mb->b, 1);
|
src_c_addr = vb2_dma_contig_plane_dma_addr(src_mb->b, 1);
|
||||||
s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
|
s5p_mfc_set_enc_frame_buffer(ctx, src_y_addr, src_c_addr);
|
||||||
dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
|
dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
|
||||||
dst_mb->used = 1;
|
dst_mb->used = 1;
|
||||||
dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0);
|
dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
|
||||||
dst_size = vb2_plane_size(dst_mb->b, 0);
|
dst_size = vb2_plane_size(dst_mb->b, 0);
|
||||||
s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
|
s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
|
||||||
spin_unlock_irqrestore(&dev->irqlock, flags);
|
spin_unlock_irqrestore(&dev->irqlock, flags);
|
||||||
@@ -1200,7 +1200,7 @@ static void s5p_mfc_run_init_dec(struct s5p_mfc_ctx *ctx)
|
|||||||
s5p_mfc_set_dec_desc_buffer(ctx);
|
s5p_mfc_set_dec_desc_buffer(ctx);
|
||||||
mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused);
|
mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused);
|
||||||
s5p_mfc_set_dec_stream_buffer(ctx,
|
s5p_mfc_set_dec_stream_buffer(ctx,
|
||||||
vb2_dma_contig_plane_paddr(temp_vb->b, 0),
|
vb2_dma_contig_plane_dma_addr(temp_vb->b, 0),
|
||||||
0, temp_vb->b->v4l2_planes[0].bytesused);
|
0, temp_vb->b->v4l2_planes[0].bytesused);
|
||||||
spin_unlock_irqrestore(&dev->irqlock, flags);
|
spin_unlock_irqrestore(&dev->irqlock, flags);
|
||||||
dev->curr_ctx = ctx->num;
|
dev->curr_ctx = ctx->num;
|
||||||
@@ -1219,7 +1219,7 @@ static void s5p_mfc_run_init_enc(struct s5p_mfc_ctx *ctx)
|
|||||||
s5p_mfc_set_enc_ref_buffer(ctx);
|
s5p_mfc_set_enc_ref_buffer(ctx);
|
||||||
spin_lock_irqsave(&dev->irqlock, flags);
|
spin_lock_irqsave(&dev->irqlock, flags);
|
||||||
dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
|
dst_mb = list_entry(ctx->dst_queue.next, struct s5p_mfc_buf, list);
|
||||||
dst_addr = vb2_dma_contig_plane_paddr(dst_mb->b, 0);
|
dst_addr = vb2_dma_contig_plane_dma_addr(dst_mb->b, 0);
|
||||||
dst_size = vb2_plane_size(dst_mb->b, 0);
|
dst_size = vb2_plane_size(dst_mb->b, 0);
|
||||||
s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
|
s5p_mfc_set_enc_stream_buffer(ctx, dst_addr, dst_size);
|
||||||
spin_unlock_irqrestore(&dev->irqlock, flags);
|
spin_unlock_irqrestore(&dev->irqlock, flags);
|
||||||
@@ -1255,7 +1255,7 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
|
|||||||
temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
temp_vb = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
||||||
mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused);
|
mfc_debug(2, "Header size: %d\n", temp_vb->b->v4l2_planes[0].bytesused);
|
||||||
s5p_mfc_set_dec_stream_buffer(ctx,
|
s5p_mfc_set_dec_stream_buffer(ctx,
|
||||||
vb2_dma_contig_plane_paddr(temp_vb->b, 0),
|
vb2_dma_contig_plane_dma_addr(temp_vb->b, 0),
|
||||||
0, temp_vb->b->v4l2_planes[0].bytesused);
|
0, temp_vb->b->v4l2_planes[0].bytesused);
|
||||||
spin_unlock_irqrestore(&dev->irqlock, flags);
|
spin_unlock_irqrestore(&dev->irqlock, flags);
|
||||||
dev->curr_ctx = ctx->num;
|
dev->curr_ctx = ctx->num;
|
||||||
|
@@ -86,7 +86,7 @@ static void mxr_graph_buffer_set(struct mxr_layer *layer,
|
|||||||
dma_addr_t addr = 0;
|
dma_addr_t addr = 0;
|
||||||
|
|
||||||
if (buf)
|
if (buf)
|
||||||
addr = vb2_dma_contig_plane_paddr(&buf->vb, 0);
|
addr = vb2_dma_contig_plane_dma_addr(&buf->vb, 0);
|
||||||
mxr_reg_graph_buffer(layer->mdev, layer->idx, addr);
|
mxr_reg_graph_buffer(layer->mdev, layer->idx, addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@@ -97,9 +97,9 @@ static void mxr_vp_buffer_set(struct mxr_layer *layer,
|
|||||||
mxr_reg_vp_buffer(layer->mdev, luma_addr, chroma_addr);
|
mxr_reg_vp_buffer(layer->mdev, luma_addr, chroma_addr);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
luma_addr[0] = vb2_dma_contig_plane_paddr(&buf->vb, 0);
|
luma_addr[0] = vb2_dma_contig_plane_dma_addr(&buf->vb, 0);
|
||||||
if (layer->fmt->num_subframes == 2) {
|
if (layer->fmt->num_subframes == 2) {
|
||||||
chroma_addr[0] = vb2_dma_contig_plane_paddr(&buf->vb, 1);
|
chroma_addr[0] = vb2_dma_contig_plane_dma_addr(&buf->vb, 1);
|
||||||
} else {
|
} else {
|
||||||
/* FIXME: mxr_get_plane_size compute integer division,
|
/* FIXME: mxr_get_plane_size compute integer division,
|
||||||
* which is slow and should not be performed in interrupt */
|
* which is slow and should not be performed in interrupt */
|
||||||
|
@@ -312,7 +312,7 @@ static int sh_mobile_ceu_capture(struct sh_mobile_ceu_dev *pcdev)
|
|||||||
bottom2 = CDBCR;
|
bottom2 = CDBCR;
|
||||||
}
|
}
|
||||||
|
|
||||||
phys_addr_top = vb2_dma_contig_plane_paddr(pcdev->active, 0);
|
phys_addr_top = vb2_dma_contig_plane_dma_addr(pcdev->active, 0);
|
||||||
|
|
||||||
ceu_write(pcdev, top1, phys_addr_top);
|
ceu_write(pcdev, top1, phys_addr_top);
|
||||||
if (V4L2_FIELD_NONE != pcdev->field) {
|
if (V4L2_FIELD_NONE != pcdev->field) {
|
||||||
|
@@ -24,7 +24,7 @@ struct vb2_dc_conf {
|
|||||||
struct vb2_dc_buf {
|
struct vb2_dc_buf {
|
||||||
struct vb2_dc_conf *conf;
|
struct vb2_dc_conf *conf;
|
||||||
void *vaddr;
|
void *vaddr;
|
||||||
dma_addr_t paddr;
|
dma_addr_t dma_addr;
|
||||||
unsigned long size;
|
unsigned long size;
|
||||||
struct vm_area_struct *vma;
|
struct vm_area_struct *vma;
|
||||||
atomic_t refcount;
|
atomic_t refcount;
|
||||||
@@ -42,7 +42,7 @@ static void *vb2_dma_contig_alloc(void *alloc_ctx, unsigned long size)
|
|||||||
if (!buf)
|
if (!buf)
|
||||||
return ERR_PTR(-ENOMEM);
|
return ERR_PTR(-ENOMEM);
|
||||||
|
|
||||||
buf->vaddr = dma_alloc_coherent(conf->dev, size, &buf->paddr,
|
buf->vaddr = dma_alloc_coherent(conf->dev, size, &buf->dma_addr,
|
||||||
GFP_KERNEL);
|
GFP_KERNEL);
|
||||||
if (!buf->vaddr) {
|
if (!buf->vaddr) {
|
||||||
dev_err(conf->dev, "dma_alloc_coherent of size %ld failed\n",
|
dev_err(conf->dev, "dma_alloc_coherent of size %ld failed\n",
|
||||||
@@ -69,7 +69,7 @@ static void vb2_dma_contig_put(void *buf_priv)
|
|||||||
|
|
||||||
if (atomic_dec_and_test(&buf->refcount)) {
|
if (atomic_dec_and_test(&buf->refcount)) {
|
||||||
dma_free_coherent(buf->conf->dev, buf->size, buf->vaddr,
|
dma_free_coherent(buf->conf->dev, buf->size, buf->vaddr,
|
||||||
buf->paddr);
|
buf->dma_addr);
|
||||||
kfree(buf);
|
kfree(buf);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -78,7 +78,7 @@ static void *vb2_dma_contig_cookie(void *buf_priv)
|
|||||||
{
|
{
|
||||||
struct vb2_dc_buf *buf = buf_priv;
|
struct vb2_dc_buf *buf = buf_priv;
|
||||||
|
|
||||||
return &buf->paddr;
|
return &buf->dma_addr;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void *vb2_dma_contig_vaddr(void *buf_priv)
|
static void *vb2_dma_contig_vaddr(void *buf_priv)
|
||||||
@@ -106,7 +106,7 @@ static int vb2_dma_contig_mmap(void *buf_priv, struct vm_area_struct *vma)
|
|||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
return vb2_mmap_pfn_range(vma, buf->paddr, buf->size,
|
return vb2_mmap_pfn_range(vma, buf->dma_addr, buf->size,
|
||||||
&vb2_common_vm_ops, &buf->handler);
|
&vb2_common_vm_ops, &buf->handler);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -115,14 +115,14 @@ static void *vb2_dma_contig_get_userptr(void *alloc_ctx, unsigned long vaddr,
|
|||||||
{
|
{
|
||||||
struct vb2_dc_buf *buf;
|
struct vb2_dc_buf *buf;
|
||||||
struct vm_area_struct *vma;
|
struct vm_area_struct *vma;
|
||||||
dma_addr_t paddr = 0;
|
dma_addr_t dma_addr = 0;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
buf = kzalloc(sizeof *buf, GFP_KERNEL);
|
buf = kzalloc(sizeof *buf, GFP_KERNEL);
|
||||||
if (!buf)
|
if (!buf)
|
||||||
return ERR_PTR(-ENOMEM);
|
return ERR_PTR(-ENOMEM);
|
||||||
|
|
||||||
ret = vb2_get_contig_userptr(vaddr, size, &vma, &paddr);
|
ret = vb2_get_contig_userptr(vaddr, size, &vma, &dma_addr);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
printk(KERN_ERR "Failed acquiring VMA for vaddr 0x%08lx\n",
|
printk(KERN_ERR "Failed acquiring VMA for vaddr 0x%08lx\n",
|
||||||
vaddr);
|
vaddr);
|
||||||
@@ -131,7 +131,7 @@ static void *vb2_dma_contig_get_userptr(void *alloc_ctx, unsigned long vaddr,
|
|||||||
}
|
}
|
||||||
|
|
||||||
buf->size = size;
|
buf->size = size;
|
||||||
buf->paddr = paddr;
|
buf->dma_addr = dma_addr;
|
||||||
buf->vma = vma;
|
buf->vma = vma;
|
||||||
|
|
||||||
return buf;
|
return buf;
|
||||||
|
@@ -17,11 +17,11 @@
|
|||||||
#include <linux/dma-mapping.h>
|
#include <linux/dma-mapping.h>
|
||||||
|
|
||||||
static inline dma_addr_t
|
static inline dma_addr_t
|
||||||
vb2_dma_contig_plane_paddr(struct vb2_buffer *vb, unsigned int plane_no)
|
vb2_dma_contig_plane_dma_addr(struct vb2_buffer *vb, unsigned int plane_no)
|
||||||
{
|
{
|
||||||
dma_addr_t *paddr = vb2_plane_cookie(vb, plane_no);
|
dma_addr_t *addr = vb2_plane_cookie(vb, plane_no);
|
||||||
|
|
||||||
return *paddr;
|
return *addr;
|
||||||
}
|
}
|
||||||
|
|
||||||
void *vb2_dma_contig_init_ctx(struct device *dev);
|
void *vb2_dma_contig_init_ctx(struct device *dev);
|
||||||
|
Reference in New Issue
Block a user