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[MIPS] Define known MIPS ISA overrides for Sibyte and Excite boards.

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Signed-Off-By: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thiemo Seufer
2007-09-05 17:44:50 +01:00
committed by Ralf Baechle
parent 7ca16d269a
commit bcb0fd9463
2 changed files with 11 additions and 1 deletions
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5
include/asm-mips/mach-excite/cpu-feature-overrides.h
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@@ -34,6 +34,11 @@
#define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0
#define cpu_has_64bits 1 #define cpu_has_64bits 1
#define cpu_has_mips32r1 0
#define cpu_has_mips32r2 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_inclusive_pcaches 0 #define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32

7
include/asm-mips/mach-sibyte/cpu-feature-overrides.h
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@@ -9,7 +9,7 @@
#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H #define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
/* /*
* Sibyte are MIPS64 processors weired to a specific configuration * Sibyte are MIPS64 processors wired to a specific configuration
*/ */
#define cpu_has_watch 1 #define cpu_has_watch 1
#define cpu_has_mips16 0 #define cpu_has_mips16 0
@@ -33,6 +33,11 @@
#define cpu_has_nofpuex 0 #define cpu_has_nofpuex 0
#define cpu_has_64bits 1 #define cpu_has_64bits 1
#define cpu_has_mips32r1 1
#define cpu_has_mips32r2 0
#define cpu_has_mips64r1 1
#define cpu_has_mips64r2 0
#define cpu_has_inclusive_pcaches 0 #define cpu_has_inclusive_pcaches 0
#define cpu_dcache_line_size() 32 #define cpu_dcache_line_size() 32