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tg3: Reclaim TG3_FLG3_5761_5784_AX_FIXES flag

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This patch reclaims the TG3_FLG3_5761_5784_AX_FIXES flag.  It only
used twice in non-fast paths.  This patch also consolidates some other
places where specific 5784 AX chip revisions can be generalized.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson
2008-11-03 16:52:09 -08:00
committed by David S. Miller
parent 3f007891da
commit bcb37f6cb5
2 changed files with 7 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

21
drivers/net/tg3.c
View File

@@ -1742,7 +1742,8 @@ static int tg3_phy_reset(struct tg3 *tp)
tw32(TG3_CPMU_CTRL, cpmuctrl); tw32(TG3_CPMU_CTRL, cpmuctrl);
} }
if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX) {
u32 val; u32 val;
val = tr32(TG3_CPMU_LSPD_1000MB_CLK); val = tr32(TG3_CPMU_LSPD_1000MB_CLK);
@@ -2004,7 +2005,8 @@ static void tg3_power_down_phy(struct tg3 *tp)
(tp->tg3_flags2 & TG3_FLG2_MII_SERDES))) (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
return; return;
if (tp->tg3_flags3 & TG3_FLG3_5761_5784_AX_FIXES) { if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX) {
val = tr32(TG3_CPMU_LSPD_1000MB_CLK); val = tr32(TG3_CPMU_LSPD_1000MB_CLK);
val &= ~CPMU_LSPD_1000MB_MACCLK_MASK; val &= ~CPMU_LSPD_1000MB_MACCLK_MASK;
val |= CPMU_LSPD_1000MB_MACCLK_12_5; val |= CPMU_LSPD_1000MB_MACCLK_12_5;
@@ -3815,8 +3817,7 @@ static int tg3_setup_phy(struct tg3 *tp, int force_reset)
err = tg3_setup_copper_phy(tp, force_reset); err = tg3_setup_copper_phy(tp, force_reset);
} }
if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX) {
tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) {
u32 val, scale; u32 val, scale;
val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK; val = tr32(TG3_CPMU_CLCK_STAT) & CPMU_CLCK_STAT_MAC_CLCK_MASK;
@@ -7044,8 +7045,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tg3_write_sig_legacy(tp, RESET_KIND_INIT); tg3_write_sig_legacy(tp, RESET_KIND_INIT);
if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 || if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX) {
tp->pci_chip_rev_id == CHIPREV_ID_5784_A1) {
val = tr32(TG3_CPMU_CTRL); val = tr32(TG3_CPMU_CTRL);
val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE); val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE);
tw32(TG3_CPMU_CTRL, val); tw32(TG3_CPMU_CTRL, val);
@@ -12283,16 +12283,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 || if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) { GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785)
tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT; tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0 ||
tp->pci_chip_rev_id == CHIPREV_ID_5784_A1 ||
tp->pci_chip_rev_id == CHIPREV_ID_5761_A0 ||
tp->pci_chip_rev_id == CHIPREV_ID_5761_A1)
tp->tg3_flags3 |= TG3_FLG3_5761_5784_AX_FIXES;
}
/* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). /* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
* GPIO1 driven high will bring 5700's external PHY out of reset. * GPIO1 driven high will bring 5700's external PHY out of reset.
* It is also used as eeprom write protect on LOMs. * It is also used as eeprom write protect on LOMs.

1
drivers/net/tg3.h
View File

@@ -2510,7 +2510,6 @@ struct tg3 {
u32 tg3_flags3; u32 tg3_flags3;
#define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001 #define TG3_FLG3_NO_NVRAM_ADDR_TRANS 0x00000001
#define TG3_FLG3_ENABLE_APE 0x00000002 #define TG3_FLG3_ENABLE_APE 0x00000002
#define TG3_FLG3_5761_5784_AX_FIXES 0x00000004
#define TG3_FLG3_5701_DMA_BUG 0x00000008 #define TG3_FLG3_5701_DMA_BUG 0x00000008
#define TG3_FLG3_USE_PHYLIB 0x00000010 #define TG3_FLG3_USE_PHYLIB 0x00000010
#define TG3_FLG3_MDIOBUS_INITED 0x00000020 #define TG3_FLG3_MDIOBUS_INITED 0x00000020