RM9000 serial driver
Add support for the integrated serial ports of the MIPS RM9122 processor and its relatives. The patch also does some whitespace cleanup. [akpm@linux-foundation.org: cleanups] Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
committed by
Linus Torvalds
parent
beab697ab4
commit
bd71c182d5
@@ -1042,6 +1042,9 @@ config SOC_AU1X00
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select SYS_SUPPORTS_APM_EMULATION
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select SYS_SUPPORTS_APM_EMULATION
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select SYS_SUPPORTS_KGDB
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select SYS_SUPPORTS_KGDB
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config SERIAL_RM9000
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bool
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config PNX8550
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config PNX8550
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bool
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bool
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select SOC_PNX8550
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select SOC_PNX8550
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@@ -251,9 +251,16 @@ static const struct serial8250_config uart_config[] = {
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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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.flags = UART_CAP_FIFO | UART_CAP_UUE,
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.flags = UART_CAP_FIFO | UART_CAP_UUE,
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},
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},
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[PORT_RM9000] = {
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.name = "RM9000",
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.fifo_size = 16,
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.tx_loadsz = 16,
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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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.flags = UART_CAP_FIFO,
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},
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};
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};
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#ifdef CONFIG_SERIAL_8250_AU1X00
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#if defined (CONFIG_SERIAL_8250_AU1X00)
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/* Au1x00 UART hardware has a weird register layout */
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/* Au1x00 UART hardware has a weird register layout */
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static const u8 au_io_in_map[] = {
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static const u8 au_io_in_map[] = {
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@@ -289,6 +296,44 @@ static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
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return au_io_out_map[offset];
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return au_io_out_map[offset];
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}
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}
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#elif defined (CONFIG_SERIAL_8250_RM9K)
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static const u8
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regmap_in[8] = {
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[UART_RX] = 0x00,
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[UART_IER] = 0x0c,
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[UART_IIR] = 0x14,
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[UART_LCR] = 0x1c,
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[UART_MCR] = 0x20,
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[UART_LSR] = 0x24,
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[UART_MSR] = 0x28,
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[UART_SCR] = 0x2c
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},
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regmap_out[8] = {
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[UART_TX] = 0x04,
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[UART_IER] = 0x0c,
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[UART_FCR] = 0x18,
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[UART_LCR] = 0x1c,
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[UART_MCR] = 0x20,
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[UART_LSR] = 0x24,
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[UART_MSR] = 0x28,
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[UART_SCR] = 0x2c
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};
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static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
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{
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if (up->port.iotype != UPIO_RM9000)
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return offset;
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return regmap_in[offset];
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}
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static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
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{
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if (up->port.iotype != UPIO_RM9000)
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return offset;
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return regmap_out[offset];
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}
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#else
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#else
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/* sane hardware needs no mapping */
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/* sane hardware needs no mapping */
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@@ -311,6 +356,7 @@ static unsigned int serial_in(struct uart_8250_port *up, int offset)
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case UPIO_DWAPB:
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case UPIO_DWAPB:
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return readb(up->port.membase + offset);
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return readb(up->port.membase + offset);
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case UPIO_RM9000:
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case UPIO_MEM32:
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case UPIO_MEM32:
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return readl(up->port.membase + offset);
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return readl(up->port.membase + offset);
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@@ -348,6 +394,7 @@ serial_out(struct uart_8250_port *up, int offset, int value)
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writeb(value, up->port.membase + offset);
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writeb(value, up->port.membase + offset);
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break;
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break;
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case UPIO_RM9000:
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case UPIO_MEM32:
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case UPIO_MEM32:
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writel(value, up->port.membase + offset);
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writel(value, up->port.membase + offset);
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break;
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break;
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@@ -419,7 +466,7 @@ static inline void _serial_dl_write(struct uart_8250_port *up, int value)
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serial_outp(up, UART_DLM, value >> 8 & 0xff);
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serial_outp(up, UART_DLM, value >> 8 & 0xff);
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}
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}
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#ifdef CONFIG_SERIAL_8250_AU1X00
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#if defined (CONFIG_SERIAL_8250_AU1X00)
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/* Au1x00 haven't got a standard divisor latch */
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/* Au1x00 haven't got a standard divisor latch */
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static int serial_dl_read(struct uart_8250_port *up)
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static int serial_dl_read(struct uart_8250_port *up)
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{
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{
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@@ -436,6 +483,24 @@ static void serial_dl_write(struct uart_8250_port *up, int value)
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else
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else
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_serial_dl_write(up, value);
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_serial_dl_write(up, value);
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}
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}
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#elif defined (CONFIG_SERIAL_8250_RM9K)
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static int serial_dl_read(struct uart_8250_port *up)
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{
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return (up->port.iotype == UPIO_RM9000) ?
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(((__raw_readl(up->port.membase + 0x10) << 8) |
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(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
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_serial_dl_read(up);
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}
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static void serial_dl_write(struct uart_8250_port *up, int value)
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{
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if (up->port.iotype == UPIO_RM9000) {
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__raw_writel(value, up->port.membase + 0x08);
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__raw_writel(value >> 8, up->port.membase + 0x10);
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} else {
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_serial_dl_write(up, value);
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}
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}
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#else
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#else
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#define serial_dl_read(up) _serial_dl_read(up)
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#define serial_dl_read(up) _serial_dl_read(up)
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#define serial_dl_write(up, value) _serial_dl_write(up, value)
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#define serial_dl_write(up, value) _serial_dl_write(up, value)
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@@ -1175,8 +1240,11 @@ static void serial8250_start_tx(struct uart_port *port)
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if (up->bugs & UART_BUG_TXEN) {
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if (up->bugs & UART_BUG_TXEN) {
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unsigned char lsr, iir;
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unsigned char lsr, iir;
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lsr = serial_in(up, UART_LSR);
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lsr = serial_in(up, UART_LSR);
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iir = serial_in(up, UART_IIR);
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iir = serial_in(up, UART_IIR) & 0x0f;
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if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)
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if ((up->port.type == PORT_RM9000) ?
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(lsr & UART_LSR_THRE &&
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(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
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(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
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transmit_chars(up);
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transmit_chars(up);
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}
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}
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}
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}
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@@ -254,6 +254,15 @@ config SERIAL_8250_AU1X00
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to this option. The driver can handle 1 or 2 serial ports.
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to this option. The driver can handle 1 or 2 serial ports.
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If unsure, say N.
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If unsure, say N.
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config SERIAL_8250_RM9K
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bool "Support for MIPS RM9xxx integrated serial port"
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depends on SERIAL_8250 != n && SERIAL_RM9000
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select SERIAL_8250_SHARE_IRQ
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help
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Selecting this option will add support for the integrated serial
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port hardware found on MIPS RM9122 and similar processors.
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If unsure, say N.
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comment "Non-8250 serial port support"
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comment "Non-8250 serial port support"
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config SERIAL_AMBA_PL010
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config SERIAL_AMBA_PL010
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@@ -39,7 +39,8 @@
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#define PORT_RSA 13
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#define PORT_RSA 13
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#define PORT_NS16550A 14
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#define PORT_NS16550A 14
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#define PORT_XSCALE 15
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#define PORT_XSCALE 15
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#define PORT_MAX_8250 15 /* max port ID */
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#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
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#define PORT_MAX_8250 16 /* max port ID */
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/*
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/*
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* ARM specific type numbers. These are not currently guaranteed
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* ARM specific type numbers. These are not currently guaranteed
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@@ -231,6 +232,7 @@ struct uart_port {
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#define UPIO_AU (4) /* Au1x00 type IO */
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#define UPIO_AU (4) /* Au1x00 type IO */
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#define UPIO_TSI (5) /* Tsi108/109 type IO */
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#define UPIO_TSI (5) /* Tsi108/109 type IO */
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#define UPIO_DWAPB (6) /* DesignWare APB UART */
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#define UPIO_DWAPB (6) /* DesignWare APB UART */
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#define UPIO_RM9000 (7) /* RM9000 type IO */
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unsigned int read_status_mask; /* driver specific */
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unsigned int read_status_mask; /* driver specific */
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unsigned int ignore_status_mask; /* driver specific */
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unsigned int ignore_status_mask; /* driver specific */
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