Blackfin arch: base SIC_IWR# programming on whether the MMR exists
base SIC_IWR# programming on whether the MMR exists rather than having to maintain another list of processors Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void)
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bfin_pm_standby_restore();
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#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \
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defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x)
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#ifdef SIC_IWR0
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bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
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#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
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# ifdef SIC_IWR1
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/* BF52x system reset does not properly reset SIC_IWR1 which
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* will screw up the bootrom as it relies on MDMA0/1 waking it
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* up from IDLE instructions. See this report for more info:
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@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void)
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bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11));
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else
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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#else
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bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
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#endif
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# ifdef CONFIG_BF54x
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# endif
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# ifdef SIC_IWR2
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bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
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# endif
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#else
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