[PATCH] sh: IRQ handler updates
This moves the various IRQ controller drivers into a new subdirectory, and also extends the INTC2 IRQ handler to also deal with SH7760 and SH7780 interrupts, rather than just ST-40. The old CONFIG_SH_GENERIC has also been removed from the IRQ definitions, as new ports are expected to be based off of CONFIG_SH_UNKNOWN. Since there are plenty of incompatible machvecs, CONFIG_SH_GENERIC doesn't make sense anymore. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Linus Torvalds
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commit
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110
arch/sh/kernel/cpu/irq/imask.c
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110
arch/sh/kernel/cpu/irq/imask.c
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/*
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* arch/sh/kernel/cpu/irq/imask.c
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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*
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* Simple interrupt handling using IMASK of SR register.
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*
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*/
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/* NOTE: Will not work on level 15 */
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/spinlock.h>
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#include <linux/cache.h>
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#include <linux/irq.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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/* Bitmap of IRQ masked */
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static unsigned long imask_mask = 0x7fff;
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static int interrupt_priority = 0;
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static void enable_imask_irq(unsigned int irq);
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static void disable_imask_irq(unsigned int irq);
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static void shutdown_imask_irq(unsigned int irq);
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static void mask_and_ack_imask(unsigned int);
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static void end_imask_irq(unsigned int irq);
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#define IMASK_PRIORITY 15
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static unsigned int startup_imask_irq(unsigned int irq)
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{
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/* Nothing to do */
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return 0; /* never anything pending */
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}
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static struct hw_interrupt_type imask_irq_type = {
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.typename = "SR.IMASK",
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.startup = startup_imask_irq,
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.shutdown = shutdown_imask_irq,
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.enable = enable_imask_irq,
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.disable = disable_imask_irq,
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.ack = mask_and_ack_imask,
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.end = end_imask_irq
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};
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void static inline set_interrupt_registers(int ip)
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{
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unsigned long __dummy;
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asm volatile("ldc %2, r6_bank\n\t"
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"stc sr, %0\n\t"
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"and #0xf0, %0\n\t"
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"shlr2 %0\n\t"
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"cmp/eq #0x3c, %0\n\t"
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"bt/s 1f ! CLI-ed\n\t"
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" stc sr, %0\n\t"
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"and %1, %0\n\t"
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"or %2, %0\n\t"
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"ldc %0, sr\n"
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"1:"
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: "=&z" (__dummy)
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: "r" (~0xf0), "r" (ip << 4)
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: "t");
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}
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static void disable_imask_irq(unsigned int irq)
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{
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clear_bit(irq, &imask_mask);
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if (interrupt_priority < IMASK_PRIORITY - irq)
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interrupt_priority = IMASK_PRIORITY - irq;
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set_interrupt_registers(interrupt_priority);
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}
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static void enable_imask_irq(unsigned int irq)
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{
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set_bit(irq, &imask_mask);
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interrupt_priority = IMASK_PRIORITY - ffz(imask_mask);
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set_interrupt_registers(interrupt_priority);
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}
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static void mask_and_ack_imask(unsigned int irq)
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{
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disable_imask_irq(irq);
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}
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static void end_imask_irq(unsigned int irq)
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{
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if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
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enable_imask_irq(irq);
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}
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static void shutdown_imask_irq(unsigned int irq)
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{
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/* Nothing to do */
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}
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void make_imask_irq(unsigned int irq)
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{
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disable_irq_nosync(irq);
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irq_desc[irq].handler = &imask_irq_type;
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enable_irq(irq);
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}
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