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include/asm-x86/desc.h: checkpatch cleanups - formatting only

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Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Joe Perches
2008-03-23 01:01:58 -07:00
committed by Ingo Molnar
parent b77619001e
commit c1773a167d
1 changed files with 31 additions and 30 deletions
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25
include/asm-x86/desc.h
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@@ -62,8 +62,8 @@ static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
} }
static inline void pack_gate(gate_desc *gate, unsigned char type, static inline void pack_gate(gate_desc *gate, unsigned char type,
unsigned long base, unsigned dpl, unsigned flags, unsigned short seg) unsigned long base, unsigned dpl, unsigned flags,
unsigned short seg)
{ {
gate->a = (seg << 16) | (base & 0xffff); gate->a = (seg << 16) | (base & 0xffff);
gate->b = (base & 0xffff0000) | gate->b = (base & 0xffff0000) |
@@ -84,13 +84,13 @@ static inline int desc_empty(const void *ptr)
#define load_TR_desc() native_load_tr_desc() #define load_TR_desc() native_load_tr_desc()
#define load_gdt(dtr) native_load_gdt(dtr) #define load_gdt(dtr) native_load_gdt(dtr)
#define load_idt(dtr) native_load_idt(dtr) #define load_idt(dtr) native_load_idt(dtr)
#define load_tr(tr) __asm__ __volatile("ltr %0"::"m" (tr)) #define load_tr(tr) asm volatile("ltr %0"::"m" (tr))
#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"m" (ldt)) #define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
#define store_gdt(dtr) native_store_gdt(dtr) #define store_gdt(dtr) native_store_gdt(dtr)
#define store_idt(dtr) native_store_idt(dtr) #define store_idt(dtr) native_store_idt(dtr)
#define store_tr(tr) (tr = native_store_tr()) #define store_tr(tr) (tr = native_store_tr())
#define store_ldt(ldt) __asm__ ("sldt %0":"=m" (ldt)) #define store_ldt(ldt) asm("sldt %0":"=m" (ldt))
#define load_TLS(t, cpu) native_load_tls(t, cpu) #define load_TLS(t, cpu) native_load_tls(t, cpu)
#define set_ldt native_set_ldt #define set_ldt native_set_ldt
@@ -99,7 +99,8 @@ static inline int desc_empty(const void *ptr)
native_write_ldt_entry(dt, entry, desc) native_write_ldt_entry(dt, entry, desc)
#define write_gdt_entry(dt, entry, desc, type) \ #define write_gdt_entry(dt, entry, desc, type) \
native_write_gdt_entry(dt, entry, desc, type) native_write_gdt_entry(dt, entry, desc, type)
#define write_idt_entry(dt, entry, g) native_write_idt_entry(dt, entry, g) #define write_idt_entry(dt, entry, g) \
native_write_idt_entry(dt, entry, g)
#endif #endif
static inline void native_write_idt_entry(gate_desc *idt, int entry, static inline void native_write_idt_entry(gate_desc *idt, int entry,
@@ -159,7 +160,6 @@ static inline void set_tssldt_descriptor(void *d, unsigned long addr,
desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF; desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF;
desc->base3 = PTR_HIGH(addr); desc->base3 = PTR_HIGH(addr);
#else #else
pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0); pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
#endif #endif
} }
@@ -177,7 +177,8 @@ static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
* last valid byte * last valid byte
*/ */
set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS, set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
IO_BITMAP_OFFSET + IO_BITMAP_BYTES + sizeof(unsigned long) - 1); IO_BITMAP_OFFSET + IO_BITMAP_BYTES +
sizeof(unsigned long) - 1);
write_gdt_entry(d, entry, &tss, DESC_TSS); write_gdt_entry(d, entry, &tss, DESC_TSS);
} }
@@ -186,7 +187,7 @@ static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
static inline void native_set_ldt(const void *addr, unsigned int entries) static inline void native_set_ldt(const void *addr, unsigned int entries)
{ {
if (likely(entries == 0)) if (likely(entries == 0))
__asm__ __volatile__("lldt %w0"::"q" (0)); asm volatile("lldt %w0"::"q" (0));
else { else {
unsigned cpu = smp_processor_id(); unsigned cpu = smp_processor_id();
ldt_desc ldt; ldt_desc ldt;
@@ -195,7 +196,7 @@ static inline void native_set_ldt(const void *addr, unsigned int entries)
DESC_LDT, entries * sizeof(ldt) - 1); DESC_LDT, entries * sizeof(ldt) - 1);
write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
&ldt, DESC_LDT); &ldt, DESC_LDT);
__asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8)); asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
} }
} }
@@ -240,8 +241,8 @@ static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i]; gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
} }
#define _LDT_empty(info) (\ #define _LDT_empty(info) \
(info)->base_addr == 0 && \ ((info)->base_addr == 0 && \
(info)->limit == 0 && \ (info)->limit == 0 && \
(info)->contents == 0 && \ (info)->contents == 0 && \
(info)->read_exec_only == 1 && \ (info)->read_exec_only == 1 && \