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[ARM] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask

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Convert struct dpll_data.idlest_bit field to idlest_mask.  Needed since
OMAP2 uses two bits for DPLL IDLEST rather than one.

While here, add the missing idlest_* fields for DPLL3.

linux-omap source commits are 25bab0f176b0a97be18a1b38153f266c3a155784
and b0f7fd17db2aaf8e6e9a2732ae3f4de0874db01c.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Paul Walmsley
2009-01-28 12:08:17 -07:00
committed by Russell King
parent b8168d1e39
commit c1bd7aaf67
3 changed files with 9 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/mach-omap2/clock34xx.h
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@ -266,7 +266,7 @@ static struct dpll_data dpll1_dd = {
.autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL),
.autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
.idlest_bit = OMAP3430_ST_MPU_CLK_SHIFT,
.idlest_mask = OMAP3430_ST_MPU_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@ -339,7 +339,7 @@ static struct dpll_data dpll2_dd = {
.autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL),
.autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL),
.idlest_bit = OMAP3430_ST_IVA2_CLK_SHIFT,
.idlest_mask = OMAP3430_ST_IVA2_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@ -397,6 +397,8 @@ static struct dpll_data dpll3_dd = {
.recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
.autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@ -587,7 +589,7 @@ static struct dpll_data dpll4_dd = {
.autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
.autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
.idlest_bit = OMAP3430_ST_PERIPH_CLK_SHIFT,
.idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE
@ -926,7 +928,7 @@ static struct dpll_data dpll5_dd = {
.autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL),
.autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK,
.idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
.idlest_bit = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT,
.idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
.max_multiplier = OMAP3_MAX_DPLL_MULT,
.max_divider = OMAP3_MAX_DPLL_DIV,
.rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE