ixgbe: add WOL support for X540
Add support for WOL as determined by the EEPROM. Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
committed by
Jeff Kirsher
parent
ff9d1a5aef
commit
c23f5b6bbb
@@ -491,6 +491,7 @@ struct ixgbe_adapter {
|
|||||||
u64 rsc_total_flush;
|
u64 rsc_total_flush;
|
||||||
u32 wol;
|
u32 wol;
|
||||||
u16 eeprom_version;
|
u16 eeprom_version;
|
||||||
|
u16 eeprom_cap;
|
||||||
|
|
||||||
int node;
|
int node;
|
||||||
u32 led_reg;
|
u32 led_reg;
|
||||||
|
@@ -1888,6 +1888,7 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
|
|||||||
{
|
{
|
||||||
struct ixgbe_hw *hw = &adapter->hw;
|
struct ixgbe_hw *hw = &adapter->hw;
|
||||||
int retval = 1;
|
int retval = 1;
|
||||||
|
u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
|
||||||
|
|
||||||
/* WOL not supported except for the following */
|
/* WOL not supported except for the following */
|
||||||
switch(hw->device_id) {
|
switch(hw->device_id) {
|
||||||
@@ -1911,6 +1912,18 @@ static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
|
|||||||
case IXGBE_DEV_ID_82599_KX4:
|
case IXGBE_DEV_ID_82599_KX4:
|
||||||
retval = 0;
|
retval = 0;
|
||||||
break;
|
break;
|
||||||
|
case IXGBE_DEV_ID_X540T:
|
||||||
|
/* check eeprom to see if enabled wol */
|
||||||
|
if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
|
||||||
|
((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
|
||||||
|
(hw->bus.func == 0))) {
|
||||||
|
retval = 0;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* All others not supported */
|
||||||
|
wol->supported = 0;
|
||||||
|
break;
|
||||||
default:
|
default:
|
||||||
wol->supported = 0;
|
wol->supported = 0;
|
||||||
}
|
}
|
||||||
|
@@ -7074,6 +7074,7 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
|||||||
u16 device_caps;
|
u16 device_caps;
|
||||||
#endif
|
#endif
|
||||||
u32 eec;
|
u32 eec;
|
||||||
|
u16 wol_cap;
|
||||||
|
|
||||||
/* Catch broken hardware that put the wrong VF device ID in
|
/* Catch broken hardware that put the wrong VF device ID in
|
||||||
* the PCIe SR-IOV capability.
|
* the PCIe SR-IOV capability.
|
||||||
@@ -7338,6 +7339,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
|||||||
netdev->features &= ~NETIF_F_RXHASH;
|
netdev->features &= ~NETIF_F_RXHASH;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* WOL not supported for all but the following */
|
||||||
|
adapter->wol = 0;
|
||||||
switch (pdev->device) {
|
switch (pdev->device) {
|
||||||
case IXGBE_DEV_ID_82599_SFP:
|
case IXGBE_DEV_ID_82599_SFP:
|
||||||
/* Only this subdevice supports WOL */
|
/* Only this subdevice supports WOL */
|
||||||
@@ -7352,8 +7355,15 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
|||||||
case IXGBE_DEV_ID_82599_KX4:
|
case IXGBE_DEV_ID_82599_KX4:
|
||||||
adapter->wol = IXGBE_WUFC_MAG;
|
adapter->wol = IXGBE_WUFC_MAG;
|
||||||
break;
|
break;
|
||||||
default:
|
case IXGBE_DEV_ID_X540T:
|
||||||
adapter->wol = 0;
|
/* Check eeprom to see if it is enabled */
|
||||||
|
hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
|
||||||
|
wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
|
||||||
|
|
||||||
|
if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
|
||||||
|
((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
|
||||||
|
(hw->bus.func == 0)))
|
||||||
|
adapter->wol = IXGBE_WUFC_MAG;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
||||||
|
@@ -1754,6 +1754,10 @@ enum {
|
|||||||
#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt. SAN MAC exists */
|
#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt. SAN MAC exists */
|
||||||
#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt. WWN base exists */
|
#define IXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt. WWN base exists */
|
||||||
|
|
||||||
|
#define IXGBE_DEVICE_CAPS_WOL_PORT0_1 0x4 /* WoL supported on ports 0 & 1 */
|
||||||
|
#define IXGBE_DEVICE_CAPS_WOL_PORT0 0x8 /* WoL supported on port 0 */
|
||||||
|
#define IXGBE_DEVICE_CAPS_WOL_MASK 0xC /* Mask for WoL capabilities */
|
||||||
|
|
||||||
/* PCI Bus Info */
|
/* PCI Bus Info */
|
||||||
#define IXGBE_PCI_DEVICE_STATUS 0xAA
|
#define IXGBE_PCI_DEVICE_STATUS 0xAA
|
||||||
#define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING 0x0020
|
#define IXGBE_PCI_DEVICE_STATUS_TRANSACTION_PENDING 0x0020
|
||||||
|
Reference in New Issue
Block a user