Merge tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC changes from Borislav Petkov: "EDAC queue for 3.17: - One new edac driver for Intel E3-12xx DRAM controllers. - Out-of-subsystem changes are making the non-atomic iomem 64-bit accessors' naming explicit to show both exact order of the 32-bit accesses and the non-atomicity of the 64-bit access. Usage locations are more verbose now as to what access is exactly being done vs having a not-very telling "readq" there, for example. This is needed by E3-12xx hardware where certain mmapped registers cannot be accessed with requests crossing a dword boundary. From Jason Baron. - Extending AMD MCE signatures to a new model 60h in family 15h, from Aravind Gopalakrishnan. - An unsigned check cleanup, from Fabian Frederick" * tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: EDAC, MCE, AMD: Add MCE decoding for F15h M60h MAINTAINERS: add ie31200_edac entry ie31200_edac: Allocate mci and map mchbar first ie31200_edac: Introduce the driver x38_edac: make use of lo_hi_readq() readq/writeq: Add explicit lo_hi_[read|write]_q and hi_lo_[read|write]_q EDAC, edac_module.c: Remove unnecessary test on unsigned value
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@@ -4,8 +4,7 @@
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#include <linux/io.h>
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#include <asm-generic/int-ll64.h>
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#ifndef readq
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static inline __u64 readq(const volatile void __iomem *addr)
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static inline __u64 hi_lo_readq(const volatile void __iomem *addr)
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{
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const volatile u32 __iomem *p = addr;
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u32 low, high;
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@@ -15,14 +14,19 @@ static inline __u64 readq(const volatile void __iomem *addr)
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return low + ((u64)high << 32);
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}
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#endif
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#ifndef writeq
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static inline void writeq(__u64 val, volatile void __iomem *addr)
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static inline void hi_lo_writeq(__u64 val, volatile void __iomem *addr)
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{
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writel(val >> 32, addr + 4);
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writel(val, addr);
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}
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#ifndef readq
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#define readq hi_lo_readq
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#endif
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#ifndef writeq
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#define writeq hi_lo_writeq
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#endif
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#endif /* _ASM_IO_64_NONATOMIC_HI_LO_H_ */
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@@ -4,8 +4,7 @@
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#include <linux/io.h>
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#include <asm-generic/int-ll64.h>
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#ifndef readq
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static inline __u64 readq(const volatile void __iomem *addr)
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static inline __u64 lo_hi_readq(const volatile void __iomem *addr)
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{
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const volatile u32 __iomem *p = addr;
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u32 low, high;
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@@ -15,14 +14,19 @@ static inline __u64 readq(const volatile void __iomem *addr)
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return low + ((u64)high << 32);
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}
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#endif
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#ifndef writeq
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static inline void writeq(__u64 val, volatile void __iomem *addr)
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static inline void lo_hi_writeq(__u64 val, volatile void __iomem *addr)
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{
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writel(val, addr);
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writel(val >> 32, addr + 4);
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}
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#ifndef readq
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#define readq lo_hi_readq
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#endif
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#ifndef writeq
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#define writeq lo_hi_writeq
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#endif
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#endif /* _ASM_IO_64_NONATOMIC_LO_HI_H_ */
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