sky2: Refactor sky2_get_regs into two functions
Separate code deciding which registers can be accessed out of sky2_get_regs in preparation for adding more conditions into it. Signed-off-by: Mike McCormack <mikem@ring3k.org> Signed-off-by: Stephen Hemminger <shemminger@vyatta.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
ceba0b29e0
commit
c32bbff81c
@@ -3837,6 +3837,50 @@ static int sky2_get_regs_len(struct net_device *dev)
|
|||||||
return 0x4000;
|
return 0x4000;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
|
||||||
|
{
|
||||||
|
/* This complicated switch statement is to make sure and
|
||||||
|
* only access regions that are unreserved.
|
||||||
|
* Some blocks are only valid on dual port cards.
|
||||||
|
*/
|
||||||
|
switch (b) {
|
||||||
|
/* second port */
|
||||||
|
case 5: /* Tx Arbiter 2 */
|
||||||
|
case 9: /* RX2 */
|
||||||
|
case 14 ... 15: /* TX2 */
|
||||||
|
case 17: case 19: /* Ram Buffer 2 */
|
||||||
|
case 22 ... 23: /* Tx Ram Buffer 2 */
|
||||||
|
case 25: /* Rx MAC Fifo 1 */
|
||||||
|
case 27: /* Tx MAC Fifo 2 */
|
||||||
|
case 31: /* GPHY 2 */
|
||||||
|
case 40 ... 47: /* Pattern Ram 2 */
|
||||||
|
case 52: case 54: /* TCP Segmentation 2 */
|
||||||
|
case 112 ... 116: /* GMAC 2 */
|
||||||
|
return hw->ports > 1;
|
||||||
|
|
||||||
|
case 0: /* Control */
|
||||||
|
case 2: /* Mac address */
|
||||||
|
case 4: /* Tx Arbiter 1 */
|
||||||
|
case 7: /* PCI express reg */
|
||||||
|
case 8: /* RX1 */
|
||||||
|
case 12 ... 13: /* TX1 */
|
||||||
|
case 16: case 18:/* Rx Ram Buffer 1 */
|
||||||
|
case 20 ... 21: /* Tx Ram Buffer 1 */
|
||||||
|
case 24: /* Rx MAC Fifo 1 */
|
||||||
|
case 26: /* Tx MAC Fifo 1 */
|
||||||
|
case 28 ... 29: /* Descriptor and status unit */
|
||||||
|
case 30: /* GPHY 1*/
|
||||||
|
case 32 ... 39: /* Pattern Ram 1 */
|
||||||
|
case 48: case 50: /* TCP Segmentation 1 */
|
||||||
|
case 56 ... 60: /* PCI space */
|
||||||
|
case 80 ... 84: /* GMAC 1 */
|
||||||
|
return 1;
|
||||||
|
|
||||||
|
default:
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Returns copy of control register region
|
* Returns copy of control register region
|
||||||
* Note: ethtool_get_regs always provides full size (16k) buffer
|
* Note: ethtool_get_regs always provides full size (16k) buffer
|
||||||
@@ -3851,55 +3895,13 @@ static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
|
|||||||
regs->version = 1;
|
regs->version = 1;
|
||||||
|
|
||||||
for (b = 0; b < 128; b++) {
|
for (b = 0; b < 128; b++) {
|
||||||
/* This complicated switch statement is to make sure and
|
/* skip poisonous diagnostic ram region in block 3 */
|
||||||
* only access regions that are unreserved.
|
if (b == 3)
|
||||||
* Some blocks are only valid on dual port cards.
|
|
||||||
* and block 3 has some special diagnostic registers that
|
|
||||||
* are poison.
|
|
||||||
*/
|
|
||||||
switch (b) {
|
|
||||||
case 3:
|
|
||||||
/* skip diagnostic ram region */
|
|
||||||
memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
|
memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
|
||||||
break;
|
else if (sky2_reg_access_ok(sky2->hw, b))
|
||||||
|
|
||||||
/* dual port cards only */
|
|
||||||
case 5: /* Tx Arbiter 2 */
|
|
||||||
case 9: /* RX2 */
|
|
||||||
case 14 ... 15: /* TX2 */
|
|
||||||
case 17: case 19: /* Ram Buffer 2 */
|
|
||||||
case 22 ... 23: /* Tx Ram Buffer 2 */
|
|
||||||
case 25: /* Rx MAC Fifo 1 */
|
|
||||||
case 27: /* Tx MAC Fifo 2 */
|
|
||||||
case 31: /* GPHY 2 */
|
|
||||||
case 40 ... 47: /* Pattern Ram 2 */
|
|
||||||
case 52: case 54: /* TCP Segmentation 2 */
|
|
||||||
case 112 ... 116: /* GMAC 2 */
|
|
||||||
if (sky2->hw->ports == 1)
|
|
||||||
goto reserved;
|
|
||||||
/* fall through */
|
|
||||||
case 0: /* Control */
|
|
||||||
case 2: /* Mac address */
|
|
||||||
case 4: /* Tx Arbiter 1 */
|
|
||||||
case 7: /* PCI express reg */
|
|
||||||
case 8: /* RX1 */
|
|
||||||
case 12 ... 13: /* TX1 */
|
|
||||||
case 16: case 18:/* Rx Ram Buffer 1 */
|
|
||||||
case 20 ... 21: /* Tx Ram Buffer 1 */
|
|
||||||
case 24: /* Rx MAC Fifo 1 */
|
|
||||||
case 26: /* Tx MAC Fifo 1 */
|
|
||||||
case 28 ... 29: /* Descriptor and status unit */
|
|
||||||
case 30: /* GPHY 1*/
|
|
||||||
case 32 ... 39: /* Pattern Ram 1 */
|
|
||||||
case 48: case 50: /* TCP Segmentation 1 */
|
|
||||||
case 56 ... 60: /* PCI space */
|
|
||||||
case 80 ... 84: /* GMAC 1 */
|
|
||||||
memcpy_fromio(p, io, 128);
|
memcpy_fromio(p, io, 128);
|
||||||
break;
|
else
|
||||||
default:
|
|
||||||
reserved:
|
|
||||||
memset(p, 0, 128);
|
memset(p, 0, 128);
|
||||||
}
|
|
||||||
|
|
||||||
p += 128;
|
p += 128;
|
||||||
io += 128;
|
io += 128;
|
||||||
|
Reference in New Issue
Block a user