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OMAPDSS: DISPC: Pass overlay params as arguments to dispc_ovl_setup()

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dispc_ovl_enable_replication() and dispc_ovl_set_fifo_threshold() are currently
called in configure_overlay(). These are the only functions which cause DISPC
register writes of overlay parameters outside of dispc_ovl_setup().

Move these to dispc_ovl_setup() and pass replication, fifo_low and fifo_high
thresholds as arguments to dispc_ovl_setup() in order to be aligned with other
overlay parameters. No functional changes are made.

Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Archit Taneja
2011-09-14 11:52:54 +05:30
committed by Tomi Valkeinen
parent a4273b7cca
commit c3d92529c3
3 changed files with 17 additions and 15 deletions
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20
drivers/video/omap2/dss/dispc.c
View File

@@ -971,7 +971,7 @@ static void dispc_ovl_set_vid_color_conv(enum omap_plane plane, bool enable)
dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val); dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), val);
} }
void dispc_ovl_enable_replication(enum omap_plane plane, bool enable) static void dispc_ovl_enable_replication(enum omap_plane plane, bool enable)
{ {
static const unsigned shifts[] = { 5, 10, 10 }; static const unsigned shifts[] = { 5, 10, 10 };
int shift; int shift;
@@ -1019,7 +1019,8 @@ u32 dispc_ovl_get_fifo_size(enum omap_plane plane)
return dispc.fifo_size[plane]; return dispc.fifo_size[plane];
} }
void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high) static void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low,
u32 high)
{ {
u8 hi_start, hi_end, lo_start, lo_end; u8 hi_start, hi_end, lo_start, lo_end;
u32 unit; u32 unit;
@@ -1675,7 +1676,8 @@ static unsigned long calc_fclk(enum omap_channel channel, u16 width,
} }
int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
bool ilace, enum omap_channel channel) bool ilace, enum omap_channel channel, bool replication,
u32 fifo_low, u32 fifo_high)
{ {
const int maxdownscale = cpu_is_omap34xx() ? 4 : 2; const int maxdownscale = cpu_is_omap34xx() ? 4 : 2;
bool five_taps = 0; bool five_taps = 0;
@@ -1688,10 +1690,11 @@ int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
unsigned int field_offset = 0; unsigned int field_offset = 0;
DSSDBG("dispc_ovl_setup %d, pa %x, pa_uv %x, sw %d, %d,%d, %dx%d -> " DSSDBG("dispc_ovl_setup %d, pa %x, pa_uv %x, sw %d, %d,%d, %dx%d -> "
"%dx%d, cmode %x, rot %d, mir %d, ilace %d chan %d\n", "%dx%d, cmode %x, rot %d, mir %d, ilace %d chan %d repl %d "
plane, oi->paddr, oi->p_uv_addr, oi->screen_width, oi->pos_x, "fifo_low %d fifo high %d\n", plane, oi->paddr, oi->p_uv_addr,
oi->pos_y, oi->width, oi->height, oi->out_width, oi->out_height, oi->screen_width, oi->pos_x, oi->pos_y, oi->width, oi->height,
oi->color_mode, oi->rotation, oi->mirror, ilace, channel); oi->out_width, oi->out_height, oi->color_mode, oi->rotation,
oi->mirror, ilace, channel, replication, fifo_low, fifo_high);
if (oi->paddr == 0) if (oi->paddr == 0)
return -EINVAL; return -EINVAL;
@@ -1839,6 +1842,9 @@ int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
dispc_ovl_set_channel_out(plane, channel); dispc_ovl_set_channel_out(plane, channel);
dispc_ovl_enable_replication(plane, replication);
dispc_ovl_set_fifo_threshold(plane, fifo_low, fifo_high);
return 0; return 0;
} }

5
drivers/video/omap2/dss/dss.h
View File

@@ -400,12 +400,11 @@ int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
u32 dispc_ovl_get_fifo_size(enum omap_plane plane); u32 dispc_ovl_get_fifo_size(enum omap_plane plane);
void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
u32 dispc_ovl_get_burst_size(enum omap_plane plane); u32 dispc_ovl_get_burst_size(enum omap_plane plane);
int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
bool ilace, enum omap_channel channel); bool ilace, enum omap_channel channel, bool replication,
u32 fifo_low, u32 fifo_high);
int dispc_ovl_enable(enum omap_plane plane, bool enable); int dispc_ovl_enable(enum omap_plane plane, bool enable);
void dispc_ovl_enable_replication(enum omap_plane plane, bool enable);
void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable); void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);

7
drivers/video/omap2/dss/manager.c
View File

@@ -940,7 +940,8 @@ static int configure_overlay(enum omap_plane plane)
new_oi.out_height = outh; new_oi.out_height = outh;
new_oi.paddr = paddr; new_oi.paddr = paddr;
r = dispc_ovl_setup(plane, &new_oi, c->ilace, c->channel); r = dispc_ovl_setup(plane, &new_oi, c->ilace, c->channel,
c->replication, c->fifo_low, c->fifo_high);
if (r) { if (r) {
/* this shouldn't happen */ /* this shouldn't happen */
DSSERR("dispc_ovl_setup failed for ovl %d\n", plane); DSSERR("dispc_ovl_setup failed for ovl %d\n", plane);
@@ -948,10 +949,6 @@ static int configure_overlay(enum omap_plane plane)
return r; return r;
} }
dispc_ovl_enable_replication(plane, c->replication);
dispc_ovl_set_fifo_threshold(plane, c->fifo_low, c->fifo_high);
dispc_ovl_enable(plane, 1); dispc_ovl_enable(plane, 1);
return 0; return 0;