ARM: OMAP: Sync core code with linux-omap
This patch syncs omap specific core code with linux-omap. Most of the changes are needed to fix bitrot caused by driver updates in linux-omap tree. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
committed by
Russell King
parent
f4e4c324a5
commit
c40fae9525
@ -37,9 +37,27 @@
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#include <asm/arch/usb.h>
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#include <asm/arch/board.h>
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#ifdef CONFIG_ARCH_OMAP1
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#define INT_USB_IRQ_GEN IH2_BASE + 20
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#define INT_USB_IRQ_NISO IH2_BASE + 30
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#define INT_USB_IRQ_ISO IH2_BASE + 29
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#define INT_USB_IRQ_HGEN INT_USB_HHC_1
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#define INT_USB_IRQ_OTG IH2_BASE + 8
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#else
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#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN
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#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO
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#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO
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#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN
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#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG
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#endif
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/* These routines should handle the standard chip-specific modes
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* for usb0/1/2 ports, covering basic mux and transceiver setup.
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* Call omap_usb_init() once, from INIT_MACHINE().
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*
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* Some board-*.c files will need to set up additional mux options,
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* like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
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@ -96,19 +114,26 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
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{
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u32 syscon1 = 0;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG &= ~USBT0WRMODEI(USB_BIDIR_TLL);
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if (nwires == 0) {
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if (!cpu_is_omap15xx()) {
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if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
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/* pulldown D+/D- */
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USB_TRANSCEIVER_CTRL_REG &= ~(3 << 1);
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}
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return 0;
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}
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if (is_device)
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omap_cfg_reg(W4_USB_PUEN);
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if (is_device) {
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if (cpu_is_omap24xx())
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omap_cfg_reg(J20_24XX_USB0_PUEN);
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else
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omap_cfg_reg(W4_USB_PUEN);
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}
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/* internal transceiver */
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if (nwires == 2) {
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/* internal transceiver (unavailable on 17xx, 24xx) */
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if (!cpu_class_is_omap2() && nwires == 2) {
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// omap_cfg_reg(P9_USB_DP);
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// omap_cfg_reg(R8_USB_DM);
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@ -136,29 +161,50 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
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return 0;
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}
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omap_cfg_reg(V6_USB0_TXD);
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omap_cfg_reg(W9_USB0_TXEN);
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omap_cfg_reg(W5_USB0_SE0);
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(K18_24XX_USB0_DAT);
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omap_cfg_reg(K19_24XX_USB0_TXEN);
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omap_cfg_reg(J14_24XX_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(J18_24XX_USB0_RCV);
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} else {
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omap_cfg_reg(V6_USB0_TXD);
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omap_cfg_reg(W9_USB0_TXEN);
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omap_cfg_reg(W5_USB0_SE0);
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if (nwires != 3)
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omap_cfg_reg(Y5_USB0_RCV);
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}
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/* NOTE: SPEED and SUSP aren't configured here */
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/* NOTE: SPEED and SUSP aren't configured here. OTG hosts
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* may be able to use I2C requests to set those bits along
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* with VBUS switching and overcurrent detction.
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*/
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if (nwires != 3)
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omap_cfg_reg(Y5_USB0_RCV);
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if (nwires != 6)
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if (cpu_class_is_omap1() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
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switch (nwires) {
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR);
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break;
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case 6:
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syscon1 = 3;
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omap_cfg_reg(AA9_USB0_VP);
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omap_cfg_reg(R9_USB0_VM);
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(J19_24XX_USB0_VP);
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omap_cfg_reg(K20_24XX_USB0_VM);
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CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_UNIDIR);
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} else {
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omap_cfg_reg(AA9_USB0_VP);
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omap_cfg_reg(R9_USB0_VM);
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB2_UNI_R;
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}
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break;
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default:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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@ -171,14 +217,22 @@ static u32 __init omap_usb1_init(unsigned nwires)
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{
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u32 syscon1 = 0;
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if (nwires != 6 && !cpu_is_omap15xx())
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if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG &= ~USBT1WRMODEI(USB_BIDIR_TLL);
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if (nwires == 0)
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return 0;
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/* external transceiver */
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omap_cfg_reg(USB1_TXD);
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omap_cfg_reg(USB1_TXEN);
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if (cpu_class_is_omap1()) {
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omap_cfg_reg(USB1_TXD);
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omap_cfg_reg(USB1_TXEN);
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if (nwires != 3)
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omap_cfg_reg(USB1_RCV);
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}
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB1_SEO);
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omap_cfg_reg(USB1_SPEED);
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@ -190,20 +244,38 @@ static u32 __init omap_usb1_init(unsigned nwires)
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} else if (cpu_is_omap1710()) {
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omap_cfg_reg(R13_1710_USB1_SE0);
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// SUSP
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} else if (cpu_is_omap24xx()) {
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/* NOTE: board-specific code must set up pin muxing for usb1,
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* since each signal could come out on either of two balls.
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*/
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} else {
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pr_debug("usb unrecognized\n");
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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if (nwires != 3)
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omap_cfg_reg(USB1_RCV);
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switch (nwires) {
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case 2:
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if (!cpu_is_omap24xx())
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goto bad;
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM
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*/
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syscon1 = 1;
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CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR_TLL);
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break;
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR);
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break;
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case 6:
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if (cpu_is_omap24xx())
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goto bad;
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syscon1 = 3;
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omap_cfg_reg(USB1_VP);
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omap_cfg_reg(USB1_VM);
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@ -211,6 +283,7 @@ static u32 __init omap_usb1_init(unsigned nwires)
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USB_TRANSCEIVER_CTRL_REG |= CONF_USB1_UNI_R;
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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1, nwires);
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}
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@ -221,10 +294,17 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
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{
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u32 syscon1 = 0;
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/* NOTE erratum: must leave USB2_UNI_R set if usb0 in use */
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if (cpu_is_omap24xx()) {
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CONTROL_DEVCONF_REG &= ~(USBT2WRMODEI(USB_BIDIR_TLL)
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| USBT2TLL5PI);
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alt_pingroup = 0;
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}
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/* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
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if (alt_pingroup || nwires == 0)
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return 0;
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if (nwires != 6 && !cpu_is_omap15xx())
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if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6)
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USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB2_UNI_R;
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/* external transceiver */
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@ -242,19 +322,54 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
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if (nwires != 3)
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omap_cfg_reg(Y5_USB2_RCV);
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// FIXME omap_cfg_reg(USB2_SPEED);
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} else if (cpu_is_omap24xx()) {
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omap_cfg_reg(Y11_24XX_USB2_DAT);
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omap_cfg_reg(AA10_24XX_USB2_SE0);
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if (nwires > 2)
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omap_cfg_reg(AA12_24XX_USB2_TXEN);
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if (nwires > 3)
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omap_cfg_reg(AA6_24XX_USB2_RCV);
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} else {
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pr_debug("usb unrecognized\n");
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pr_debug("usb%d cpu unrecognized\n", 1);
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return 0;
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}
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// omap_cfg_reg(USB2_SUSP);
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// if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
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switch (nwires) {
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case 2:
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if (!cpu_is_omap24xx())
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goto bad;
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM
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*/
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syscon1 = 1;
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CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR_TLL);
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break;
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case 3:
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syscon1 = 2;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR);
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break;
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case 4:
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syscon1 = 1;
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if (cpu_is_omap24xx())
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CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR);
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break;
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case 5:
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if (!cpu_is_omap24xx())
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goto bad;
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omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
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/* NOTE: board-specific code must override this setting if
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* this TLL link is not using DP/DM. Something must also
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* set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
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*/
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syscon1 = 3;
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CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_UNIDIR_TLL)
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| USBT2TLL5PI;
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break;
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case 6:
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if (cpu_is_omap24xx())
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goto bad;
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syscon1 = 3;
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if (cpu_is_omap15xx()) {
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omap_cfg_reg(USB2_VP);
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@ -266,6 +381,7 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
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}
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break;
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default:
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bad:
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printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
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2, nwires);
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}
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@ -294,13 +410,13 @@ static struct resource udc_resources[] = {
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.end = UDC_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, { /* general IRQ */
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.start = IH2_BASE + 20,
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.start = INT_USB_IRQ_GEN,
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.flags = IORESOURCE_IRQ,
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}, { /* PIO IRQ */
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.start = IH2_BASE + 30,
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.start = INT_USB_IRQ_NISO,
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.flags = IORESOURCE_IRQ,
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}, { /* SOF IRQ */
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.start = IH2_BASE + 29,
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.start = INT_USB_IRQ_ISO,
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -329,11 +445,11 @@ static u64 ohci_dmamask = ~(u32)0;
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static struct resource ohci_resources[] = {
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{
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.start = OMAP_OHCI_BASE,
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.end = OMAP_OHCI_BASE + 4096 - 1,
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.end = OMAP_OHCI_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_USB_HHC_1,
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.start = INT_USB_IRQ_HGEN,
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -361,7 +477,7 @@ static struct resource otg_resources[] = {
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.end = OTG_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IH2_BASE + 8,
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.start = INT_USB_IRQ_OTG,
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.flags = IORESOURCE_IRQ,
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},
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};
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@ -385,7 +501,7 @@ static struct platform_device otg_device = {
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// FIXME correct answer depends on hmc_mode,
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// as does any nonzero value for config->otg port number
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// as does (on omap1) any nonzero value for config->otg port number
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#ifdef CONFIG_USB_GADGET_OMAP
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#define is_usb0_device(config) 1
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#else
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@ -426,12 +542,13 @@ omap_otg_init(struct omap_usb_config *config)
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if (config->otg)
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syscon |= OTG_EN;
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#endif
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pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
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if (cpu_class_is_omap1())
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pr_debug("USB_TRANSCEIVER_CTRL_REG = %03x\n", USB_TRANSCEIVER_CTRL_REG);
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pr_debug("OTG_SYSCON_2_REG = %08x\n", syscon);
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OTG_SYSCON_2_REG = syscon;
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printk("USB: hmc %d", config->hmc_mode);
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if (alt_pingroup)
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if (!alt_pingroup)
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printk(", usb2 alt %d wires", config->pins[2]);
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else if (config->pins[0])
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printk(", usb0 %d wires%s", config->pins[0],
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@ -444,10 +561,12 @@ omap_otg_init(struct omap_usb_config *config)
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printk(", Mini-AB on usb%d", config->otg - 1);
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printk("\n");
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/* leave USB clocks/controllers off until needed */
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ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
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ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
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ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
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if (cpu_class_is_omap1()) {
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/* leave USB clocks/controllers off until needed */
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ULPD_SOFT_REQ_REG &= ~SOFT_USB_CLK_REQ;
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ULPD_CLOCK_CTRL_REG &= ~USB_MCLK_EN;
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ULPD_CLOCK_CTRL_REG |= DIS_USB_PVCI_CLK;
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}
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syscon = OTG_SYSCON_1_REG;
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syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
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@ -585,7 +704,7 @@ omap_usb_init(void)
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}
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platform_data = *config;
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if (cpu_is_omap730() || cpu_is_omap16xx())
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if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
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omap_otg_init(&platform_data);
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else if (cpu_is_omap15xx())
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omap_1510_usb_init(&platform_data);
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