Staging: comedi: remove C99 comments in gsc_hpdi.c
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
6eef3af5dd
commit
c52c19c336
@@ -62,8 +62,8 @@ static int hpdi_cancel(struct comedi_device * dev, struct comedi_subdevice * s);
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static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG);
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static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG);
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static int dio_config_block_size(struct comedi_device * dev, unsigned int * data);
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static int dio_config_block_size(struct comedi_device * dev, unsigned int * data);
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#undef HPDI_DEBUG // disable debugging messages
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#undef HPDI_DEBUG /* disable debugging messages */
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//#define HPDI_DEBUG // enable debugging code
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/* #define HPDI_DEBUG enable debugging code */
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#ifdef HPDI_DEBUG
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#ifdef HPDI_DEBUG
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#define DEBUG_PRINT(format, args...) rt_printk(format , ## args )
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#define DEBUG_PRINT(format, args...) rt_printk(format , ## args )
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@@ -71,12 +71,12 @@ static int dio_config_block_size(struct comedi_device * dev, unsigned int * data
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#define DEBUG_PRINT(format, args...)
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#define DEBUG_PRINT(format, args...)
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#endif
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#endif
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#define TIMER_BASE 50 // 20MHz master clock
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#define TIMER_BASE 50 /* 20MHz master clock */
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#define DMA_BUFFER_SIZE 0x10000
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#define DMA_BUFFER_SIZE 0x10000
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#define NUM_DMA_BUFFERS 4
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#define NUM_DMA_BUFFERS 4
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#define NUM_DMA_DESCRIPTORS 256
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#define NUM_DMA_DESCRIPTORS 256
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// indices of base address regions
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/* indices of base address regions */
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enum base_address_regions {
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enum base_address_regions {
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PLX9080_BADDRINDEX = 0,
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PLX9080_BADDRINDEX = 0,
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HPDI_BADDRINDEX = 2,
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HPDI_BADDRINDEX = 2,
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@@ -115,7 +115,7 @@ int command_channel_valid(unsigned int channel)
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return 1;
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return 1;
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}
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}
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// bit definitions
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/* bit definitions */
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enum firmware_revision_bits {
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enum firmware_revision_bits {
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FEATURES_REG_PRESENT_BIT = 0x8000,
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FEATURES_REG_PRESENT_BIT = 0x8000,
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@@ -184,7 +184,7 @@ enum board_status_bits {
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uint32_t almost_full_bits(unsigned int num_words)
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uint32_t almost_full_bits(unsigned int num_words)
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{
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{
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// XXX need to add or subtract one?
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/* XXX need to add or subtract one? */
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return (num_words << 16) & 0xff0000;
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return (num_words << 16) & 0xff0000;
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}
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}
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@@ -194,7 +194,7 @@ uint32_t almost_empty_bits(unsigned int num_words)
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}
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}
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unsigned int almost_full_num_words(uint32_t bits)
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unsigned int almost_full_num_words(uint32_t bits)
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{
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{
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// XXX need to add or subtract one?
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/* XXX need to add or subtract one? */
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return (bits >> 16) & 0xffff;
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return (bits >> 16) & 0xffff;
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}
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}
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unsigned int almost_empty_num_words(uint32_t bits)
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unsigned int almost_empty_num_words(uint32_t bits)
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@@ -263,8 +263,8 @@ uint32_t intr_active_high_bit(int interrupt_source)
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struct hpdi_board {
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struct hpdi_board {
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char *name;
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char *name;
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int device_id; // pci device id
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int device_id; /* pci device id */
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int subdevice_id; // pci subdevice id
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int subdevice_id; /* pci subdevice id */
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};
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};
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@@ -303,25 +303,25 @@ static inline struct hpdi_board *board(const struct comedi_device * dev)
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struct hpdi_private {
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struct hpdi_private {
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struct pci_dev *hw_dev; // pointer to board's pci_dev struct
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struct pci_dev *hw_dev; /* pointer to board's pci_dev struct */
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// base addresses (physical)
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/* base addresses (physical) */
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resource_size_t plx9080_phys_iobase;
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resource_size_t plx9080_phys_iobase;
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resource_size_t hpdi_phys_iobase;
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resource_size_t hpdi_phys_iobase;
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// base addresses (ioremapped)
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/* base addresses (ioremapped) */
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void *plx9080_iobase;
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void *plx9080_iobase;
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void *hpdi_iobase;
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void *hpdi_iobase;
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uint32_t *dio_buffer[NUM_DMA_BUFFERS]; // dma buffers
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uint32_t *dio_buffer[NUM_DMA_BUFFERS]; /* dma buffers */
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dma_addr_t dio_buffer_phys_addr[NUM_DMA_BUFFERS]; // physical addresses of dma buffers
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dma_addr_t dio_buffer_phys_addr[NUM_DMA_BUFFERS]; /* physical addresses of dma buffers */
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struct plx_dma_desc *dma_desc; // array of dma descriptors read by plx9080, allocated to get proper alignment
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struct plx_dma_desc *dma_desc; /* array of dma descriptors read by plx9080, allocated to get proper alignment */
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dma_addr_t dma_desc_phys_addr; // physical address of dma descriptor array
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dma_addr_t dma_desc_phys_addr; /* physical address of dma descriptor array */
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unsigned int num_dma_descriptors;
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unsigned int num_dma_descriptors;
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uint32_t *desc_dio_buffer[NUM_DMA_DESCRIPTORS]; // pointer to start of buffers indexed by descriptor
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uint32_t *desc_dio_buffer[NUM_DMA_DESCRIPTORS]; /* pointer to start of buffers indexed by descriptor */
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volatile unsigned int dma_desc_index; // index of the dma descriptor that is currently being used
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volatile unsigned int dma_desc_index; /* index of the dma descriptor that is currently being used */
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unsigned int tx_fifo_size;
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unsigned int tx_fifo_size;
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unsigned int rx_fifo_size;
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unsigned int rx_fifo_size;
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volatile unsigned long dio_count;
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volatile unsigned long dio_count;
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volatile uint32_t bits[24]; // software copies of values written to hpdi registers
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volatile uint32_t bits[24]; /* software copies of values written to hpdi registers */
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volatile unsigned int block_size; // number of bytes at which to generate COMEDI_CB_BLOCK events
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volatile unsigned int block_size; /* number of bytes at which to generate COMEDI_CB_BLOCK events */
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unsigned dio_config_output:1;
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unsigned dio_config_output:1;
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};
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};
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@@ -373,13 +373,13 @@ static void disable_plx_interrupts(struct comedi_device * dev)
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writel(0, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
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writel(0, priv(dev)->plx9080_iobase + PLX_INTRCS_REG);
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}
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}
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// initialize plx9080 chip
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/* initialize plx9080 chip */
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static void init_plx9080(struct comedi_device * dev)
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static void init_plx9080(struct comedi_device * dev)
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{
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{
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uint32_t bits;
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uint32_t bits;
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void *plx_iobase = priv(dev)->plx9080_iobase;
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void *plx_iobase = priv(dev)->plx9080_iobase;
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// plx9080 dump
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/* plx9080 dump */
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DEBUG_PRINT(" plx interrupt status 0x%x\n",
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DEBUG_PRINT(" plx interrupt status 0x%x\n",
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readl(plx_iobase + PLX_INTRCS_REG));
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readl(plx_iobase + PLX_INTRCS_REG));
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DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
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DEBUG_PRINT(" plx id bits 0x%x\n", readl(plx_iobase + PLX_ID_REG));
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@@ -417,21 +417,21 @@ static void init_plx9080(struct comedi_device * dev)
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abort_dma(dev, 0);
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abort_dma(dev, 0);
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abort_dma(dev, 1);
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abort_dma(dev, 1);
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// configure dma0 mode
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/* configure dma0 mode */
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bits = 0;
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bits = 0;
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// enable ready input
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/* enable ready input */
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bits |= PLX_DMA_EN_READYIN_BIT;
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bits |= PLX_DMA_EN_READYIN_BIT;
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// enable dma chaining
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/* enable dma chaining */
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bits |= PLX_EN_CHAIN_BIT;
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bits |= PLX_EN_CHAIN_BIT;
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// enable interrupt on dma done (probably don't need this, since chain never finishes)
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/* enable interrupt on dma done (probably don't need this, since chain never finishes) */
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bits |= PLX_EN_DMA_DONE_INTR_BIT;
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bits |= PLX_EN_DMA_DONE_INTR_BIT;
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// don't increment local address during transfers (we are transferring from a fixed fifo register)
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/* don't increment local address during transfers (we are transferring from a fixed fifo register) */
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bits |= PLX_LOCAL_ADDR_CONST_BIT;
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bits |= PLX_LOCAL_ADDR_CONST_BIT;
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// route dma interrupt to pci bus
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/* route dma interrupt to pci bus */
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bits |= PLX_DMA_INTR_PCI_BIT;
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bits |= PLX_DMA_INTR_PCI_BIT;
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// enable demand mode
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/* enable demand mode */
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bits |= PLX_DEMAND_MODE_BIT;
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bits |= PLX_DEMAND_MODE_BIT;
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// enable local burst mode
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/* enable local burst mode */
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bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
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bits |= PLX_DMA_LOCAL_BURST_EN_BIT;
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bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
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bits |= PLX_LOCAL_BUS_32_WIDE_BITS;
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writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
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writel(bits, plx_iobase + PLX_DMA0_MODE_REG);
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@@ -484,7 +484,7 @@ static int init_hpdi(struct comedi_device * dev)
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writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
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writel(0, priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
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// enable interrupts
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/* enable interrupts */
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plx_intcsr_bits =
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plx_intcsr_bits =
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ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
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ICS_AERR | ICS_PERR | ICS_PIE | ICS_PLIE | ICS_PAIE | ICS_LIE |
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ICS_DMA0_E;
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ICS_DMA0_E;
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@@ -493,7 +493,7 @@ static int init_hpdi(struct comedi_device * dev)
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return 0;
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return 0;
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}
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}
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// setup dma descriptors so a link completes every 'transfer_size' bytes
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/* setup dma descriptors so a link completes every 'transfer_size' bytes */
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static int setup_dma_descriptors(struct comedi_device * dev,
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static int setup_dma_descriptors(struct comedi_device * dev,
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unsigned int transfer_size)
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unsigned int transfer_size)
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{
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{
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@@ -545,7 +545,7 @@ static int setup_dma_descriptors(struct comedi_device * dev,
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(unsigned long)priv(dev)->dma_desc[i].next);
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(unsigned long)priv(dev)->dma_desc[i].next);
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}
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}
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priv(dev)->num_dma_descriptors = i;
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priv(dev)->num_dma_descriptors = i;
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// fix last descriptor to point back to first
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/* fix last descriptor to point back to first */
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priv(dev)->dma_desc[i - 1].next =
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priv(dev)->dma_desc[i - 1].next =
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cpu_to_le32(priv(dev)->dma_desc_phys_addr | next_bits);
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cpu_to_le32(priv(dev)->dma_desc_phys_addr | next_bits);
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DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1,
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DEBUG_PRINT(" desc %i next fixup 0x%lx\n", i - 1,
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@@ -573,9 +573,9 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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pcidev = pci_get_subsys(PCI_VENDOR_ID_PLX,
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pcidev = pci_get_subsys(PCI_VENDOR_ID_PLX,
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hpdi_boards[i].device_id, PCI_VENDOR_ID_PLX,
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hpdi_boards[i].device_id, PCI_VENDOR_ID_PLX,
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hpdi_boards[i].subdevice_id, pcidev);
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hpdi_boards[i].subdevice_id, pcidev);
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// was a particular bus/slot requested?
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/* was a particular bus/slot requested? */
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if (it->options[0] || it->options[1]) {
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if (it->options[0] || it->options[1]) {
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// are we on the wrong bus/slot?
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/* are we on the wrong bus/slot? */
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if (pcidev->bus->number != it->options[0] ||
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if (pcidev->bus->number != it->options[0] ||
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PCI_SLOT(pcidev->devfn) !=
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PCI_SLOT(pcidev->devfn) !=
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it->options[1])
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it->options[1])
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@@ -603,7 +603,7 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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}
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}
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pci_set_master(pcidev);
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pci_set_master(pcidev);
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//Initialize dev->board_name
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/* Initialize dev->board_name */
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dev->board_name = board(dev)->name;
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dev->board_name = board(dev)->name;
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priv(dev)->plx9080_phys_iobase =
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priv(dev)->plx9080_phys_iobase =
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@@ -611,7 +611,7 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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priv(dev)->hpdi_phys_iobase =
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priv(dev)->hpdi_phys_iobase =
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pci_resource_start(pcidev, HPDI_BADDRINDEX);
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pci_resource_start(pcidev, HPDI_BADDRINDEX);
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// remap, won't work with 2.0 kernels but who cares
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/* remap, won't work with 2.0 kernels but who cares */
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priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase,
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priv(dev)->plx9080_iobase = ioremap(priv(dev)->plx9080_phys_iobase,
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pci_resource_len(pcidev, PLX9080_BADDRINDEX));
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pci_resource_len(pcidev, PLX9080_BADDRINDEX));
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priv(dev)->hpdi_iobase = ioremap(priv(dev)->hpdi_phys_iobase,
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priv(dev)->hpdi_iobase = ioremap(priv(dev)->hpdi_phys_iobase,
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@@ -626,7 +626,7 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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init_plx9080(dev);
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init_plx9080(dev);
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// get irq
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/* get irq */
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if (comedi_request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
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if (comedi_request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED,
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driver_hpdi.driver_name, dev)) {
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driver_hpdi.driver_name, dev)) {
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printk(" unable to allocate irq %u\n", pcidev->irq);
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printk(" unable to allocate irq %u\n", pcidev->irq);
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@@ -636,7 +636,7 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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printk(" irq %u\n", dev->irq);
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printk(" irq %u\n", dev->irq);
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// alocate pci dma buffers
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/* alocate pci dma buffers */
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for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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priv(dev)->dio_buffer[i] =
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priv(dev)->dio_buffer[i] =
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pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE,
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pci_alloc_consistent(priv(dev)->hw_dev, DMA_BUFFER_SIZE,
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@@ -645,7 +645,7 @@ static int hpdi_attach(struct comedi_device * dev, struct comedi_devconfig * it)
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priv(dev)->dio_buffer[i],
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priv(dev)->dio_buffer[i],
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(unsigned long)priv(dev)->dio_buffer_phys_addr[i]);
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(unsigned long)priv(dev)->dio_buffer_phys_addr[i]);
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}
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}
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// allocate dma descriptors
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/* allocate dma descriptors */
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priv(dev)->dma_desc = pci_alloc_consistent(priv(dev)->hw_dev,
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priv(dev)->dma_desc = pci_alloc_consistent(priv(dev)->hw_dev,
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sizeof(struct plx_dma_desc) * NUM_DMA_DESCRIPTORS,
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sizeof(struct plx_dma_desc) * NUM_DMA_DESCRIPTORS,
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&priv(dev)->dma_desc_phys_addr);
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&priv(dev)->dma_desc_phys_addr);
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@@ -681,7 +681,7 @@ static int hpdi_detach(struct comedi_device * dev)
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}
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}
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if (priv(dev)->hpdi_iobase)
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if (priv(dev)->hpdi_iobase)
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iounmap((void *)priv(dev)->hpdi_iobase);
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iounmap((void *)priv(dev)->hpdi_iobase);
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// free pci dma buffers
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/* free pci dma buffers */
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for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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for (i = 0; i < NUM_DMA_BUFFERS; i++) {
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if (priv(dev)->dio_buffer[i])
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if (priv(dev)->dio_buffer[i])
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pci_free_consistent(priv(dev)->hw_dev,
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pci_free_consistent(priv(dev)->hw_dev,
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@@ -690,7 +690,7 @@ static int hpdi_detach(struct comedi_device * dev)
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priv(dev)->
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priv(dev)->
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dio_buffer_phys_addr[i]);
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dio_buffer_phys_addr[i]);
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}
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}
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// free dma descriptors
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/* free dma descriptors */
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if (priv(dev)->dma_desc)
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if (priv(dev)->dma_desc)
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pci_free_consistent(priv(dev)->hw_dev,
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pci_free_consistent(priv(dev)->hw_dev,
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sizeof(struct plx_dma_desc) *
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sizeof(struct plx_dma_desc) *
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@@ -761,7 +761,7 @@ static int di_cmd_test(struct comedi_device * dev, struct comedi_subdevice * s,
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/* step 2: make sure trigger sources are unique and mutually compatible */
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/* step 2: make sure trigger sources are unique and mutually compatible */
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// uniqueness check
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/* uniqueness check */
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if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
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if (cmd->stop_src != TRIG_COUNT && cmd->stop_src != TRIG_NONE)
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err++;
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err++;
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@@ -807,7 +807,7 @@ static int di_cmd_test(struct comedi_device * dev, struct comedi_subdevice * s,
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if (cmd->chanlist) {
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if (cmd->chanlist) {
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for (i = 1; i < cmd->chanlist_len; i++) {
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for (i = 1; i < cmd->chanlist_len; i++) {
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if (CR_CHAN(cmd->chanlist[i]) != i) {
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if (CR_CHAN(cmd->chanlist[i]) != i) {
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// XXX could support 8 channels or 16 channels
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/* XXX could support 8 channels or 16 channels */
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comedi_error(dev,
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comedi_error(dev,
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"chanlist must be channels 0 to 31 in order");
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"chanlist must be channels 0 to 31 in order");
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err++;
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err++;
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@@ -860,15 +860,15 @@ static int di_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
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writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
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writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_TRANSFER_SIZE_REG);
|
||||||
writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
|
writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG);
|
||||||
writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
|
writel(0, priv(dev)->plx9080_iobase + PLX_DMA0_LOCAL_ADDRESS_REG);
|
||||||
// give location of first dma descriptor
|
/* give location of first dma descriptor */
|
||||||
bits = priv(dev)->
|
bits = priv(dev)->
|
||||||
dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
|
dma_desc_phys_addr | PLX_DESC_IN_PCI_BIT | PLX_INTR_TERM_COUNT |
|
||||||
PLX_XFER_LOCAL_TO_PCI;
|
PLX_XFER_LOCAL_TO_PCI;
|
||||||
writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
|
writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG);
|
||||||
|
|
||||||
// spinlock for plx dma control/status reg
|
/* spinlock for plx dma control/status reg */
|
||||||
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
||||||
// enable dma transfer
|
/* enable dma transfer */
|
||||||
writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
|
writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
|
||||||
priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
||||||
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
||||||
@@ -878,10 +878,10 @@ static int di_cmd(struct comedi_device * dev, struct comedi_subdevice * s)
|
|||||||
else
|
else
|
||||||
priv(dev)->dio_count = 1;
|
priv(dev)->dio_count = 1;
|
||||||
|
|
||||||
// clear over/under run status flags
|
/* clear over/under run status flags */
|
||||||
writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT,
|
writel(RX_UNDERRUN_BIT | RX_OVERRUN_BIT,
|
||||||
priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
|
priv(dev)->hpdi_iobase + BOARD_STATUS_REG);
|
||||||
// enable interrupts
|
/* enable interrupts */
|
||||||
writel(intr_bit(RX_FULL_INTR),
|
writel(intr_bit(RX_FULL_INTR),
|
||||||
priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
|
priv(dev)->hpdi_iobase + INTERRUPT_CONTROL_REG);
|
||||||
|
|
||||||
@@ -914,7 +914,7 @@ static void drain_dma_buffers(struct comedi_device * dev, unsigned int channel)
|
|||||||
pci_addr_reg =
|
pci_addr_reg =
|
||||||
priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
|
priv(dev)->plx9080_iobase + PLX_DMA0_PCI_ADDRESS_REG;
|
||||||
|
|
||||||
// loop until we have read all the full buffers
|
/* loop until we have read all the full buffers */
|
||||||
j = 0;
|
j = 0;
|
||||||
for (next_transfer_addr = readl(pci_addr_reg);
|
for (next_transfer_addr = readl(pci_addr_reg);
|
||||||
(next_transfer_addr <
|
(next_transfer_addr <
|
||||||
@@ -925,7 +925,7 @@ static void drain_dma_buffers(struct comedi_device * dev, unsigned int channel)
|
|||||||
dma_desc_index].pci_start_addr) +
|
dma_desc_index].pci_start_addr) +
|
||||||
priv(dev)->block_size)
|
priv(dev)->block_size)
|
||||||
&& j < priv(dev)->num_dma_descriptors; j++) {
|
&& j < priv(dev)->num_dma_descriptors; j++) {
|
||||||
// transfer data from dma buffer to comedi buffer
|
/* transfer data from dma buffer to comedi buffer */
|
||||||
num_samples = priv(dev)->block_size / sizeof(uint32_t);
|
num_samples = priv(dev)->block_size / sizeof(uint32_t);
|
||||||
if (async->cmd.stop_src == TRIG_COUNT) {
|
if (async->cmd.stop_src == TRIG_COUNT) {
|
||||||
if (num_samples > priv(dev)->dio_count)
|
if (num_samples > priv(dev)->dio_count)
|
||||||
@@ -942,7 +942,7 @@ static void drain_dma_buffers(struct comedi_device * dev, unsigned int channel)
|
|||||||
priv(dev)->dma_desc[priv(dev)->dma_desc_index].next);
|
priv(dev)->dma_desc[priv(dev)->dma_desc_index].next);
|
||||||
DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
|
DEBUG_PRINT("pci addr reg 0x%x\n", next_transfer_addr);
|
||||||
}
|
}
|
||||||
// XXX check for buffer overrun somehow
|
/* XXX check for buffer overrun somehow */
|
||||||
}
|
}
|
||||||
|
|
||||||
static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG)
|
static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG)
|
||||||
@@ -975,10 +975,10 @@ static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG)
|
|||||||
writel(hpdi_intr_status,
|
writel(hpdi_intr_status,
|
||||||
priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
|
priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG);
|
||||||
}
|
}
|
||||||
// spin lock makes sure noone else changes plx dma control reg
|
/* spin lock makes sure noone else changes plx dma control reg */
|
||||||
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
||||||
dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
||||||
if (plx_status & ICS_DMA0_A) { // dma chan 0 interrupt
|
if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */
|
||||||
writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
|
writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
|
||||||
priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG);
|
||||||
|
|
||||||
@@ -990,11 +990,11 @@ static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG)
|
|||||||
}
|
}
|
||||||
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
||||||
|
|
||||||
// spin lock makes sure noone else changes plx dma control reg
|
/* spin lock makes sure noone else changes plx dma control reg */
|
||||||
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
||||||
dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
|
dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
|
||||||
if (plx_status & ICS_DMA1_A) // XXX
|
if (plx_status & ICS_DMA1_A) /* XXX */
|
||||||
{ // dma chan 1 interrupt
|
{ /* dma chan 1 interrupt */
|
||||||
writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
|
writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
|
||||||
priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
|
priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG);
|
||||||
DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
|
DEBUG_PRINT("dma1 status 0x%x\n", dma1_status);
|
||||||
@@ -1003,8 +1003,8 @@ static irqreturn_t handle_interrupt(int irq, void *d PT_REGS_ARG)
|
|||||||
}
|
}
|
||||||
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
|
||||||
|
|
||||||
// clear possible plx9080 interrupt sources
|
/* clear possible plx9080 interrupt sources */
|
||||||
if (plx_status & ICS_LDIA) { // clear local doorbell interrupt
|
if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */
|
||||||
plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
|
plx_bits = readl(priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
|
||||||
writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
|
writel(plx_bits, priv(dev)->plx9080_iobase + PLX_DBR_OUT_REG);
|
||||||
DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
|
DEBUG_PRINT(" cleared local doorbell bits 0x%x\n", plx_bits);
|
||||||
@@ -1040,7 +1040,7 @@ void abort_dma(struct comedi_device * dev, unsigned int channel)
|
|||||||
{
|
{
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
// spinlock for plx dma control/status reg
|
/* spinlock for plx dma control/status reg */
|
||||||
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
comedi_spin_lock_irqsave(&dev->spinlock, flags);
|
||||||
|
|
||||||
plx9080_abort_dma(priv(dev)->plx9080_iobase, channel);
|
plx9080_abort_dma(priv(dev)->plx9080_iobase, channel);
|
||||||
|
Reference in New Issue
Block a user