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ath9k_hw: Enable TX IQ calibration on AR9003

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To enable it we now disable and re-enable the PHY chips
after TX IQ calibration.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Luis R. Rodriguez
2010-05-19 16:45:50 -04:00
committed by John W. Linville
parent 252aa631f8
commit c5395b6743
3 changed files with 6 additions and 11 deletions
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drivers/net/wireless/ath/ath9k/hw.h
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@@ -263,7 +263,6 @@ struct ath9k_ops_config {
#define AR_BASE_FREQ_5GHZ 4900
#define AR_SPUR_FEEQ_BOUND_HT40 19
#define AR_SPUR_FEEQ_BOUND_HT20 10
bool tx_iq_calibration; /* Only available for >= AR9003 */
int spurmode;
u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
u8 max_txtrig_level;