sh: Add SCIF2 support for SH7763.
SH7763 has 3 SCIF device. Current code supports SCIF0 and 1. SCIF0 and 1 are same register constitution, but only SCIF2 is different. I added support of SCIF2. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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committed by
Paul Mundt
parent
04e917b606
commit
c63847a362
@@ -3,6 +3,7 @@
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*
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* Copyright (C) 2006 Paul Mundt
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* Copyright (C) 2007 Yoshihiro Shimoda
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* Copyright (C) 2008 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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@@ -55,6 +56,11 @@ static struct plat_sci_port sci_platform_data[] = {
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 76, 77, 79, 78 },
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}, {
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.mapbase = 0xffe10000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 104, 105, 107, 106 },
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}, {
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.flags = 0,
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}
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@@ -208,8 +214,8 @@ static struct intc_vect vectors[] __initdata = {
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INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
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INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
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INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
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INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20),
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INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60),
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INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
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INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
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INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
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INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
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};
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