Staging: comedi: dt9812: remove dt9812.h
An extra .h file is not needed for the dt9812 driver so merge it into the .c file. Cc: Anders Blomdell <anders.blomdell@control.lth.se> Cc: David Schleef <ds@schleef.org> Cc: Frank Mori Hess <fmhess@users.sourceforge.net> Cc: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Greg Kroah-Hartman
@@ -53,7 +53,212 @@ for my needs.
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#include <linux/usb.h>
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#include <linux/usb.h>
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#include "../comedidev.h"
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#include "../comedidev.h"
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#include "dt9812.h"
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#define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
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#define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
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#define DT9812_MAX_READ_CMD_PIPE_SIZE 32
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/*
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* See Silican Laboratories C8051F020/1/2/3 manual
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*/
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#define F020_SFR_P4 0x84
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#define F020_SFR_P1 0x90
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#define F020_SFR_P2 0xa0
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#define F020_SFR_P3 0xb0
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#define F020_SFR_AMX0CF 0xba
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#define F020_SFR_AMX0SL 0xbb
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#define F020_SFR_ADC0CF 0xbc
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#define F020_SFR_ADC0L 0xbe
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#define F020_SFR_ADC0H 0xbf
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#define F020_SFR_DAC0L 0xd2
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#define F020_SFR_DAC0H 0xd3
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#define F020_SFR_DAC0CN 0xd4
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#define F020_SFR_DAC1L 0xd5
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#define F020_SFR_DAC1H 0xd6
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#define F020_SFR_DAC1CN 0xd7
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#define F020_SFR_ADC0CN 0xe8
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#define F020_MASK_ADC0CF_AMP0GN0 0x01
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#define F020_MASK_ADC0CF_AMP0GN1 0x02
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#define F020_MASK_ADC0CF_AMP0GN2 0x04
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#define F020_MASK_ADC0CN_AD0EN 0x80
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#define F020_MASK_ADC0CN_AD0INT 0x20
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#define F020_MASK_ADC0CN_AD0BUSY 0x10
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#define F020_MASK_DACxCN_DACxEN 0x80
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typedef enum {
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/* A/D D/A DI DO CT */
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DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
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DT9812_DEVID_DT9812_2PT5,/* 8 2 8 8 1 0-2.44V */
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#if 0
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DT9812_DEVID_DT9813, /* 16 2 4 4 1 +/- 10V */
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DT9812_DEVID_DT9814 /* 24 2 0 0 1 +/- 10V */
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#endif
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} dt9812_devid_t;
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typedef enum {
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DT9812_GAIN_0PT25 = 1,
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DT9812_GAIN_0PT5 = 2,
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DT9812_GAIN_1 = 4,
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DT9812_GAIN_2 = 8,
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DT9812_GAIN_4 = 16,
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DT9812_GAIN_8 = 32,
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DT9812_GAIN_16 = 64,
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} dt9812_gain_t;
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typedef enum {
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DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
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/* Write Flash memory */
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DT9812_W_FLASH_DATA = 0,
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/* Read Flash memory misc config info */
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DT9812_R_FLASH_DATA = 1,
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/*
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* Register read/write commands for processor
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*/
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/* Read a single byte of USB memory */
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DT9812_R_SINGLE_BYTE_REG = 2,
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/* Write a single byte of USB memory */
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DT9812_W_SINGLE_BYTE_REG = 3,
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/* Multiple Reads of USB memory */
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DT9812_R_MULTI_BYTE_REG = 4,
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/* Multiple Writes of USB memory */
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DT9812_W_MULTI_BYTE_REG = 5,
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/* Read, (AND) with mask, OR value, then write (single) */
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DT9812_RMW_SINGLE_BYTE_REG = 6,
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/* Read, (AND) with mask, OR value, then write (multiple) */
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DT9812_RMW_MULTI_BYTE_REG = 7,
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/*
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* Register read/write commands for SMBus
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*/
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/* Read a single byte of SMBus */
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DT9812_R_SINGLE_BYTE_SMBUS = 8,
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/* Write a single byte of SMBus */
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DT9812_W_SINGLE_BYTE_SMBUS = 9,
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/* Multiple Reads of SMBus */
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DT9812_R_MULTI_BYTE_SMBUS = 10,
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/* Multiple Writes of SMBus */
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DT9812_W_MULTI_BYTE_SMBUS = 11,
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/*
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* Register read/write commands for a device
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*/
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/* Read a single byte of a device */
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DT9812_R_SINGLE_BYTE_DEV = 12,
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/* Write a single byte of a device */
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DT9812_W_SINGLE_BYTE_DEV = 13,
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/* Multiple Reads of a device */
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DT9812_R_MULTI_BYTE_DEV = 14,
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/* Multiple Writes of a device */
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DT9812_W_MULTI_BYTE_DEV = 15,
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/* Not sure if we'll need this */
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DT9812_W_DAC_THRESHOLD = 16,
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/* Set interrupt on change mask */
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DT9812_W_INT_ON_CHANGE_MASK = 17,
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/* Write (or Clear) the CGL for the ADC */
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DT9812_W_CGL = 18,
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/* Multiple Reads of USB memory */
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DT9812_R_MULTI_BYTE_USBMEM = 19,
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/* Multiple Writes to USB memory */
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DT9812_W_MULTI_BYTE_USBMEM = 20,
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/* Issue a start command to a given subsystem */
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DT9812_START_SUBSYSTEM = 21,
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/* Issue a stop command to a given subsystem */
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DT9812_STOP_SUBSYSTEM = 22,
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/* calibrate the board using CAL_POT_CMD */
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DT9812_CALIBRATE_POT = 23,
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/* set the DAC FIFO size */
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DT9812_W_DAC_FIFO_SIZE = 24,
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/* Write or Clear the CGL for the DAC */
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DT9812_W_CGL_DAC = 25,
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/* Read a single value from a subsystem */
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DT9812_R_SINGLE_VALUE_CMD = 26,
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/* Write a single value to a subsystem */
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DT9812_W_SINGLE_VALUE_CMD = 27,
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/* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
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DT9812_MAX_USB_FIRMWARE_CMD_CODE,
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} dt9812_usb_firmware_cmd_t;
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typedef struct {
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u16 numbytes;
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u16 address;
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} dt9812_flash_data_t;
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#define DT9812_MAX_NUM_MULTI_BYTE_RDS \
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((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
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typedef struct {
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u8 count;
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u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
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} dt9812_read_multi_t;
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typedef struct {
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u8 address;
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u8 value;
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} dt9812_write_byte_t;
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#define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
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((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t))
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typedef struct {
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u8 count;
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dt9812_write_byte_t write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
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} dt9812_write_multi_t;
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typedef struct {
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u8 address;
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u8 and_mask;
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u8 or_value;
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} dt9812_rmw_byte_t;
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#define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
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((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t))
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typedef struct {
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u8 count;
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dt9812_rmw_byte_t rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
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} dt9812_rmw_multi_t;
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typedef struct dt9812_usb_cmd {
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u32 cmd;
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union {
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dt9812_flash_data_t flash_data_info;
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dt9812_read_multi_t read_multi_info;
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dt9812_write_multi_t write_multi_info;
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dt9812_rmw_multi_t rmw_multi_info;
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} u;
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#if 0
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WRITE_BYTE_INFO WriteByteInfo;
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READ_BYTE_INFO ReadByteInfo;
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WRITE_MULTI_INFO WriteMultiInfo;
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READ_MULTI_INFO ReadMultiInfo;
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RMW_BYTE_INFO RMWByteInfo;
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RMW_MULTI_INFO RMWMultiInfo;
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DAC_THRESHOLD_INFO DacThresholdInfo;
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INT_ON_CHANGE_MASK_INFO IntOnChangeMaskInfo;
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CGL_INFO CglInfo;
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SUBSYSTEM_INFO SubsystemInfo;
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CAL_POT_CMD CalPotCmd;
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WRITE_DEV_BYTE_INFO WriteDevByteInfo;
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READ_DEV_BYTE_INFO ReadDevByteInfo;
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WRITE_DEV_MULTI_INFO WriteDevMultiInfo;
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READ_DEV_MULTI_INFO ReadDevMultiInfo;
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READ_SINGLE_VALUE_INFO ReadSingleValueInfo;
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WRITE_SINGLE_VALUE_INFO WriteSingleValueInfo;
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#endif
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} dt9812_usb_cmd_t;
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#define DT9812_NUM_SLOTS 16
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#define DT9812_NUM_SLOTS 16
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@@ -1,210 +0,0 @@
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#ifndef __DT9812_H__
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#define __DT9812_H__
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#define DT9812_DIAGS_BOARD_INFO_ADDR 0xFBFF
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#define DT9812_MAX_WRITE_CMD_PIPE_SIZE 32
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#define DT9812_MAX_READ_CMD_PIPE_SIZE 32
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/*
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* See Silican Laboratories C8051F020/1/2/3 manual
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*/
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#define F020_SFR_P4 0x84
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#define F020_SFR_P1 0x90
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#define F020_SFR_P2 0xa0
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#define F020_SFR_P3 0xb0
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#define F020_SFR_AMX0CF 0xba
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#define F020_SFR_AMX0SL 0xbb
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#define F020_SFR_ADC0CF 0xbc
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#define F020_SFR_ADC0L 0xbe
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#define F020_SFR_ADC0H 0xbf
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#define F020_SFR_DAC0L 0xd2
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#define F020_SFR_DAC0H 0xd3
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#define F020_SFR_DAC0CN 0xd4
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#define F020_SFR_DAC1L 0xd5
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#define F020_SFR_DAC1H 0xd6
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#define F020_SFR_DAC1CN 0xd7
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#define F020_SFR_ADC0CN 0xe8
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#define F020_MASK_ADC0CF_AMP0GN0 0x01
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#define F020_MASK_ADC0CF_AMP0GN1 0x02
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#define F020_MASK_ADC0CF_AMP0GN2 0x04
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#define F020_MASK_ADC0CN_AD0EN 0x80
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#define F020_MASK_ADC0CN_AD0INT 0x20
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#define F020_MASK_ADC0CN_AD0BUSY 0x10
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#define F020_MASK_DACxCN_DACxEN 0x80
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typedef enum {
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/* A/D D/A DI DO CT */
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DT9812_DEVID_DT9812_10, /* 8 2 8 8 1 +/- 10V */
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DT9812_DEVID_DT9812_2PT5,/* 8 2 8 8 1 0-2.44V */
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#if 0
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DT9812_DEVID_DT9813, /* 16 2 4 4 1 +/- 10V */
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DT9812_DEVID_DT9814 /* 24 2 0 0 1 +/- 10V */
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#endif
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} dt9812_devid_t;
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typedef enum {
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DT9812_GAIN_0PT25 = 1,
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DT9812_GAIN_0PT5 = 2,
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DT9812_GAIN_1 = 4,
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DT9812_GAIN_2 = 8,
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DT9812_GAIN_4 = 16,
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DT9812_GAIN_8 = 32,
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DT9812_GAIN_16 = 64,
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} dt9812_gain_t;
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typedef enum {
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DT9812_LEAST_USB_FIRMWARE_CMD_CODE = 0,
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/* Write Flash memory */
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DT9812_W_FLASH_DATA = 0,
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/* Read Flash memory misc config info */
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DT9812_R_FLASH_DATA = 1,
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/*
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* Register read/write commands for processor
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*/
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/* Read a single byte of USB memory */
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DT9812_R_SINGLE_BYTE_REG = 2,
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/* Write a single byte of USB memory */
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DT9812_W_SINGLE_BYTE_REG = 3,
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/* Multiple Reads of USB memory */
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DT9812_R_MULTI_BYTE_REG = 4,
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/* Multiple Writes of USB memory */
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DT9812_W_MULTI_BYTE_REG = 5,
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/* Read, (AND) with mask, OR value, then write (single) */
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DT9812_RMW_SINGLE_BYTE_REG = 6,
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/* Read, (AND) with mask, OR value, then write (multiple) */
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DT9812_RMW_MULTI_BYTE_REG = 7,
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/*
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* Register read/write commands for SMBus
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*/
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/* Read a single byte of SMBus */
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DT9812_R_SINGLE_BYTE_SMBUS = 8,
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/* Write a single byte of SMBus */
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DT9812_W_SINGLE_BYTE_SMBUS = 9,
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/* Multiple Reads of SMBus */
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DT9812_R_MULTI_BYTE_SMBUS = 10,
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/* Multiple Writes of SMBus */
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DT9812_W_MULTI_BYTE_SMBUS = 11,
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/*
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* Register read/write commands for a device
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*/
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/* Read a single byte of a device */
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DT9812_R_SINGLE_BYTE_DEV = 12,
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/* Write a single byte of a device */
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DT9812_W_SINGLE_BYTE_DEV = 13,
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/* Multiple Reads of a device */
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DT9812_R_MULTI_BYTE_DEV = 14,
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/* Multiple Writes of a device */
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DT9812_W_MULTI_BYTE_DEV = 15,
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/* Not sure if we'll need this */
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DT9812_W_DAC_THRESHOLD = 16,
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/* Set interrupt on change mask */
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DT9812_W_INT_ON_CHANGE_MASK = 17,
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/* Write (or Clear) the CGL for the ADC */
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DT9812_W_CGL = 18,
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/* Multiple Reads of USB memory */
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DT9812_R_MULTI_BYTE_USBMEM = 19,
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/* Multiple Writes to USB memory */
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DT9812_W_MULTI_BYTE_USBMEM = 20,
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/* Issue a start command to a given subsystem */
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DT9812_START_SUBSYSTEM = 21,
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/* Issue a stop command to a given subsystem */
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DT9812_STOP_SUBSYSTEM = 22,
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/* calibrate the board using CAL_POT_CMD */
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DT9812_CALIBRATE_POT = 23,
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/* set the DAC FIFO size */
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DT9812_W_DAC_FIFO_SIZE = 24,
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/* Write or Clear the CGL for the DAC */
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DT9812_W_CGL_DAC = 25,
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/* Read a single value from a subsystem */
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DT9812_R_SINGLE_VALUE_CMD = 26,
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/* Write a single value to a subsystem */
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DT9812_W_SINGLE_VALUE_CMD = 27,
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/* Valid DT9812_USB_FIRMWARE_CMD_CODE's will be less than this number */
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|
||||||
DT9812_MAX_USB_FIRMWARE_CMD_CODE,
|
|
||||||
} dt9812_usb_firmware_cmd_t;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u16 numbytes;
|
|
||||||
u16 address;
|
|
||||||
} dt9812_flash_data_t;
|
|
||||||
|
|
||||||
#define DT9812_MAX_NUM_MULTI_BYTE_RDS \
|
|
||||||
((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(u8))
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u8 count;
|
|
||||||
u8 address[DT9812_MAX_NUM_MULTI_BYTE_RDS];
|
|
||||||
} dt9812_read_multi_t;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u8 address;
|
|
||||||
u8 value;
|
|
||||||
} dt9812_write_byte_t;
|
|
||||||
|
|
||||||
#define DT9812_MAX_NUM_MULTI_BYTE_WRTS \
|
|
||||||
((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_write_byte_t))
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u8 count;
|
|
||||||
dt9812_write_byte_t write[DT9812_MAX_NUM_MULTI_BYTE_WRTS];
|
|
||||||
} dt9812_write_multi_t;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u8 address;
|
|
||||||
u8 and_mask;
|
|
||||||
u8 or_value;
|
|
||||||
} dt9812_rmw_byte_t;
|
|
||||||
|
|
||||||
#define DT9812_MAX_NUM_MULTI_BYTE_RMWS \
|
|
||||||
((DT9812_MAX_WRITE_CMD_PIPE_SIZE - 4 - 1) / sizeof(dt9812_rmw_byte_t))
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
u8 count;
|
|
||||||
dt9812_rmw_byte_t rmw[DT9812_MAX_NUM_MULTI_BYTE_RMWS];
|
|
||||||
} dt9812_rmw_multi_t;
|
|
||||||
|
|
||||||
typedef struct dt9812_usb_cmd {
|
|
||||||
|
|
||||||
u32 cmd;
|
|
||||||
union {
|
|
||||||
dt9812_flash_data_t flash_data_info;
|
|
||||||
dt9812_read_multi_t read_multi_info;
|
|
||||||
dt9812_write_multi_t write_multi_info;
|
|
||||||
dt9812_rmw_multi_t rmw_multi_info;
|
|
||||||
} u;
|
|
||||||
#if 0
|
|
||||||
WRITE_BYTE_INFO WriteByteInfo;
|
|
||||||
READ_BYTE_INFO ReadByteInfo;
|
|
||||||
WRITE_MULTI_INFO WriteMultiInfo;
|
|
||||||
READ_MULTI_INFO ReadMultiInfo;
|
|
||||||
RMW_BYTE_INFO RMWByteInfo;
|
|
||||||
RMW_MULTI_INFO RMWMultiInfo;
|
|
||||||
DAC_THRESHOLD_INFO DacThresholdInfo;
|
|
||||||
INT_ON_CHANGE_MASK_INFO IntOnChangeMaskInfo;
|
|
||||||
CGL_INFO CglInfo;
|
|
||||||
SUBSYSTEM_INFO SubsystemInfo;
|
|
||||||
CAL_POT_CMD CalPotCmd;
|
|
||||||
WRITE_DEV_BYTE_INFO WriteDevByteInfo;
|
|
||||||
READ_DEV_BYTE_INFO ReadDevByteInfo;
|
|
||||||
WRITE_DEV_MULTI_INFO WriteDevMultiInfo;
|
|
||||||
READ_DEV_MULTI_INFO ReadDevMultiInfo;
|
|
||||||
READ_SINGLE_VALUE_INFO ReadSingleValueInfo;
|
|
||||||
WRITE_SINGLE_VALUE_INFO WriteSingleValueInfo;
|
|
||||||
#endif
|
|
||||||
} dt9812_usb_cmd_t;
|
|
||||||
|
|
||||||
#endif
|
|
||||||
Reference in New Issue
Block a user