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[ARM] 3832/1: iop3xx: coding style cleanup

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Since the iop32x code isn't iop321-specific, and the iop33x code isn't
iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up
the code to conform to the coding style guidelines somewhat better.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
2006-09-18 23:26:25 +01:00
committed by Russell King
parent 475549faa1
commit c852ac8044
41 changed files with 376 additions and 558 deletions
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6
arch/arm/oprofile/op_model_xscale.c
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@@ -37,10 +37,10 @@
#define XSCALE_PMU_IRQ IRQ_XS80200_PMU
#endif
#ifdef CONFIG_ARCH_IOP32X
#define XSCALE_PMU_IRQ IRQ_IOP321_CORE_PMU
#define XSCALE_PMU_IRQ IRQ_IOP32X_CORE_PMU
#endif
#ifdef CONFIG_ARCH_IOP33X
#define XSCALE_PMU_IRQ IRQ_IOP331_CORE_PMU
#define XSCALE_PMU_IRQ IRQ_IOP33X_CORE_PMU
#endif
#ifdef CONFIG_ARCH_PXA
#define XSCALE_PMU_IRQ IRQ_PMU
@@ -88,7 +88,7 @@ static struct pmu_counter results[MAX_COUNTERS];
/*
* There are two versions of the PMU in current XScale processors
* with differing register layouts and number of performance counters.
* e.g. IOP321 is xsc1 whilst IOP331 is xsc2.
* e.g. IOP32x is xsc1 whilst IOP33x is xsc2.
* We detect which register layout to use in xscale_detect_pmu()
*/
enum { PMU_XSC1, PMU_XSC2 };