Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/drzeus/mmc: mmc: correct request error handling mmc: Flush block queue when removing card mmc: sdhci high speed support mmc: Support for high speed SD cards mmc: Fix mmc_delay() function mmc: Add support for mmc v4 wide-bus modes [PATCH] mmc: Add support for mmc v4 high speed mode trivial change for mmc/Kconfig: MMC_PXA does not mean only PXA255 Make general code cleanups Add MMC_CAP_{MULTIWRITE,BYTEBLOCK} flags Platform device error handling cleanup Move register definitions away from the header file Change OMAP_MMC_{READ,WRITE} macros to use the host pointer Replace base with virt_base and phys_base mmc: constify mmc_host_ops vectors mmc: remove kernel_thread()
This commit is contained in:
@@ -38,7 +38,57 @@
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#include <asm/arch/fpga.h>
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#include <asm/arch/tps65010.h>
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#include "omap.h"
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#define OMAP_MMC_REG_CMD 0x00
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#define OMAP_MMC_REG_ARGL 0x04
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#define OMAP_MMC_REG_ARGH 0x08
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#define OMAP_MMC_REG_CON 0x0c
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#define OMAP_MMC_REG_STAT 0x10
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#define OMAP_MMC_REG_IE 0x14
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#define OMAP_MMC_REG_CTO 0x18
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#define OMAP_MMC_REG_DTO 0x1c
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#define OMAP_MMC_REG_DATA 0x20
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#define OMAP_MMC_REG_BLEN 0x24
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#define OMAP_MMC_REG_NBLK 0x28
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#define OMAP_MMC_REG_BUF 0x2c
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#define OMAP_MMC_REG_SDIO 0x34
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#define OMAP_MMC_REG_REV 0x3c
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#define OMAP_MMC_REG_RSP0 0x40
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#define OMAP_MMC_REG_RSP1 0x44
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#define OMAP_MMC_REG_RSP2 0x48
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#define OMAP_MMC_REG_RSP3 0x4c
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#define OMAP_MMC_REG_RSP4 0x50
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#define OMAP_MMC_REG_RSP5 0x54
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#define OMAP_MMC_REG_RSP6 0x58
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#define OMAP_MMC_REG_RSP7 0x5c
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#define OMAP_MMC_REG_IOSR 0x60
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#define OMAP_MMC_REG_SYSC 0x64
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#define OMAP_MMC_REG_SYSS 0x68
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#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
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#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
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#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
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#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
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#define OMAP_MMC_STAT_A_FULL (1 << 10)
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#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
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#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
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#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
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#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
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#define OMAP_MMC_STAT_END_BUSY (1 << 4)
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#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
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#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
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#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
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#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
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#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
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/*
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* Command types
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*/
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#define OMAP_MMC_CMDTYPE_BC 0
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#define OMAP_MMC_CMDTYPE_BCR 1
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#define OMAP_MMC_CMDTYPE_AC 2
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#define OMAP_MMC_CMDTYPE_ADTC 3
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#define DRIVER_NAME "mmci-omap"
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#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
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@@ -60,8 +110,9 @@ struct mmc_omap_host {
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unsigned char id; /* 16xx chips have 2 MMC blocks */
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struct clk * iclk;
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struct clk * fclk;
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struct resource *res;
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void __iomem *base;
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struct resource *mem_res;
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void __iomem *virt_base;
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unsigned int phys_base;
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int irq;
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unsigned char bus_mode;
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unsigned char hw_bus_mode;
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@@ -191,16 +242,16 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
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clk_enable(host->fclk);
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OMAP_MMC_WRITE(host->base, CTO, 200);
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OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff);
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OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16);
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OMAP_MMC_WRITE(host->base, IE,
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OMAP_MMC_WRITE(host, CTO, 200);
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OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
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OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
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OMAP_MMC_WRITE(host, IE,
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OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
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OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
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OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
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OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
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OMAP_MMC_STAT_END_OF_DATA);
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OMAP_MMC_WRITE(host->base, CMD, cmdreg);
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OMAP_MMC_WRITE(host, CMD, cmdreg);
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}
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static void
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@@ -296,22 +347,22 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
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if (cmd->flags & MMC_RSP_136) {
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/* response type 2 */
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cmd->resp[3] =
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OMAP_MMC_READ(host->base, RSP0) |
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(OMAP_MMC_READ(host->base, RSP1) << 16);
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OMAP_MMC_READ(host, RSP0) |
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(OMAP_MMC_READ(host, RSP1) << 16);
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cmd->resp[2] =
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OMAP_MMC_READ(host->base, RSP2) |
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(OMAP_MMC_READ(host->base, RSP3) << 16);
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OMAP_MMC_READ(host, RSP2) |
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(OMAP_MMC_READ(host, RSP3) << 16);
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cmd->resp[1] =
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OMAP_MMC_READ(host->base, RSP4) |
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(OMAP_MMC_READ(host->base, RSP5) << 16);
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OMAP_MMC_READ(host, RSP4) |
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(OMAP_MMC_READ(host, RSP5) << 16);
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cmd->resp[0] =
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OMAP_MMC_READ(host->base, RSP6) |
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(OMAP_MMC_READ(host->base, RSP7) << 16);
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OMAP_MMC_READ(host, RSP6) |
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(OMAP_MMC_READ(host, RSP7) << 16);
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} else {
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/* response types 1, 1b, 3, 4, 5, 6 */
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cmd->resp[0] =
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OMAP_MMC_READ(host->base, RSP6) |
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(OMAP_MMC_READ(host->base, RSP7) << 16);
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OMAP_MMC_READ(host, RSP6) |
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(OMAP_MMC_READ(host, RSP7) << 16);
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}
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}
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@@ -354,9 +405,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
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host->data->bytes_xfered += n;
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if (write) {
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__raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
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__raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
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} else {
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__raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n);
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__raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
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}
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}
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@@ -386,11 +437,11 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
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int transfer_error;
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if (host->cmd == NULL && host->data == NULL) {
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status = OMAP_MMC_READ(host->base, STAT);
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status = OMAP_MMC_READ(host, STAT);
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dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
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if (status != 0) {
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OMAP_MMC_WRITE(host->base, STAT, status);
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OMAP_MMC_WRITE(host->base, IE, 0);
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OMAP_MMC_WRITE(host, STAT, status);
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OMAP_MMC_WRITE(host, IE, 0);
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}
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return IRQ_HANDLED;
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}
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@@ -399,8 +450,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
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end_transfer = 0;
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transfer_error = 0;
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while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) {
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OMAP_MMC_WRITE(host->base, STAT, status);
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while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
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OMAP_MMC_WRITE(host, STAT, status);
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#ifdef CONFIG_MMC_DEBUG
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dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
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status, host->cmd != NULL ? host->cmd->opcode : -1);
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@@ -470,8 +521,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
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if (status & OMAP_MMC_STAT_CARD_ERR) {
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if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
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u32 response = OMAP_MMC_READ(host->base, RSP6)
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| (OMAP_MMC_READ(host->base, RSP7) << 16);
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u32 response = OMAP_MMC_READ(host, RSP6)
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| (OMAP_MMC_READ(host, RSP7) << 16);
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/* STOP sometimes sets must-ignore bits */
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if (!(response & (R1_CC_ERROR
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| R1_ILLEGAL_COMMAND
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@@ -530,12 +581,6 @@ static void mmc_omap_switch_timer(unsigned long arg)
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schedule_work(&host->switch_work);
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}
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/* FIXME: Handle card insertion and removal properly. Maybe use a mask
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* for MMC state? */
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static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
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{
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}
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static void mmc_omap_switch_handler(void *data)
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{
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struct mmc_omap_host *host = (struct mmc_omap_host *) data;
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@@ -581,7 +626,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
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int dst_port = 0;
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int sync_dev = 0;
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data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA;
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data_addr = host->phys_base + OMAP_MMC_REG_DATA;
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frame = data->blksz;
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count = sg_dma_len(sg);
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@@ -642,7 +687,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
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/* Max limit for DMA frame count is 0xffff */
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BUG_ON(count > 0xffff);
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OMAP_MMC_WRITE(host->base, BUF, buf);
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OMAP_MMC_WRITE(host, BUF, buf);
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omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
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frame, count, OMAP_DMA_SYNC_FRAME,
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sync_dev, 0);
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@@ -727,11 +772,11 @@ static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_reques
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{
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u16 reg;
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reg = OMAP_MMC_READ(host->base, SDIO);
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reg = OMAP_MMC_READ(host, SDIO);
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reg &= ~(1 << 5);
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OMAP_MMC_WRITE(host->base, SDIO, reg);
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OMAP_MMC_WRITE(host, SDIO, reg);
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/* Set maximum timeout */
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OMAP_MMC_WRITE(host->base, CTO, 0xff);
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OMAP_MMC_WRITE(host, CTO, 0xff);
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}
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static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
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@@ -745,14 +790,14 @@ static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_reque
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timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
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/* Check if we need to use timeout multiplier register */
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reg = OMAP_MMC_READ(host->base, SDIO);
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reg = OMAP_MMC_READ(host, SDIO);
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if (timeout > 0xffff) {
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reg |= (1 << 5);
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timeout /= 1024;
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} else
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reg &= ~(1 << 5);
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OMAP_MMC_WRITE(host->base, SDIO, reg);
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OMAP_MMC_WRITE(host->base, DTO, timeout);
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OMAP_MMC_WRITE(host, SDIO, reg);
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OMAP_MMC_WRITE(host, DTO, timeout);
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}
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static void
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@@ -764,19 +809,18 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
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host->data = data;
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if (data == NULL) {
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OMAP_MMC_WRITE(host->base, BLEN, 0);
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OMAP_MMC_WRITE(host->base, NBLK, 0);
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OMAP_MMC_WRITE(host->base, BUF, 0);
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OMAP_MMC_WRITE(host, BLEN, 0);
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OMAP_MMC_WRITE(host, NBLK, 0);
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OMAP_MMC_WRITE(host, BUF, 0);
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host->dma_in_use = 0;
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set_cmd_timeout(host, req);
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return;
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}
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block_size = data->blksz;
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OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1);
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OMAP_MMC_WRITE(host->base, BLEN, block_size - 1);
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OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
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OMAP_MMC_WRITE(host, BLEN, block_size - 1);
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set_data_timeout(host, req);
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/* cope with calling layer confusion; it issues "single
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@@ -818,7 +862,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
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/* Revert to PIO? */
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if (!use_dma) {
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OMAP_MMC_WRITE(host->base, BUF, 0x1f1f);
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OMAP_MMC_WRITE(host, BUF, 0x1f1f);
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host->total_bytes_left = data->blocks * block_size;
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host->sg_len = sg_len;
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mmc_omap_sg_to_buf(host);
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@@ -844,7 +888,6 @@ static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
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static void innovator_fpga_socket_power(int on)
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{
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#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
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if (on) {
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fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
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OMAP1510_FPGA_POWER);
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@@ -870,8 +913,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
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/* GPIO 4 of TPS65010 sends SD_EN signal */
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tps65010_set_gpio_out_value(GPIO4, HIGH);
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else if (cpu_is_omap24xx()) {
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u16 reg = OMAP_MMC_READ(host->base, CON);
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OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11));
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u16 reg = OMAP_MMC_READ(host, CON);
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OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
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} else
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if (host->power_pin >= 0)
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omap_set_gpio_dataout(host->power_pin, 1);
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@@ -883,8 +926,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
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else if (machine_is_omap_h3())
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tps65010_set_gpio_out_value(GPIO4, LOW);
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else if (cpu_is_omap24xx()) {
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u16 reg = OMAP_MMC_READ(host->base, CON);
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OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11));
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u16 reg = OMAP_MMC_READ(host, CON);
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OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
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} else
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if (host->power_pin >= 0)
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omap_set_gpio_dataout(host->power_pin, 0);
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@@ -926,7 +969,7 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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case MMC_POWER_UP:
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case MMC_POWER_ON:
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mmc_omap_power(host, 1);
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dsor |= 1<<11;
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dsor |= 1 << 11;
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break;
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}
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@@ -940,14 +983,14 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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* which results in the while loop below getting stuck.
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* Writing to the CON register twice seems to do the trick. */
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for (i = 0; i < 2; i++)
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OMAP_MMC_WRITE(host->base, CON, dsor);
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OMAP_MMC_WRITE(host, CON, dsor);
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if (ios->power_mode == MMC_POWER_UP) {
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/* Send clock cycles, poll completion */
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OMAP_MMC_WRITE(host->base, IE, 0);
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OMAP_MMC_WRITE(host->base, STAT, 0xffff);
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OMAP_MMC_WRITE(host->base, CMD, 1<<7);
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while (0 == (OMAP_MMC_READ(host->base, STAT) & 1));
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OMAP_MMC_WRITE(host->base, STAT, 1);
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OMAP_MMC_WRITE(host, IE, 0);
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OMAP_MMC_WRITE(host, STAT, 0xffff);
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OMAP_MMC_WRITE(host, CMD, 1 << 7);
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while ((OMAP_MMC_READ(host, STAT) & 1) == 0);
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OMAP_MMC_WRITE(host, STAT, 1);
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}
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clk_disable(host->fclk);
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}
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@@ -959,7 +1002,7 @@ static int mmc_omap_get_ro(struct mmc_host *mmc)
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return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
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}
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static struct mmc_host_ops mmc_omap_ops = {
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static const struct mmc_host_ops mmc_omap_ops = {
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.request = mmc_omap_request,
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.set_ios = mmc_omap_set_ios,
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.get_ro = mmc_omap_get_ro,
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@@ -970,25 +1013,29 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
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struct omap_mmc_conf *minfo = pdev->dev.platform_data;
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struct mmc_host *mmc;
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struct mmc_omap_host *host = NULL;
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struct resource *r;
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struct resource *res;
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int ret = 0;
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int irq;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (minfo == NULL) {
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dev_err(&pdev->dev, "platform data missing\n");
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return -ENXIO;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (!r || irq < 0)
|
||||
if (res == NULL || irq < 0)
|
||||
return -ENXIO;
|
||||
|
||||
r = request_mem_region(pdev->resource[0].start,
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1,
|
||||
pdev->name);
|
||||
if (!r)
|
||||
res = request_mem_region(res->start, res->end - res->start + 1,
|
||||
pdev->name);
|
||||
if (res == NULL)
|
||||
return -EBUSY;
|
||||
|
||||
mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
|
||||
if (!mmc) {
|
||||
if (mmc == NULL) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
goto err_free_mem_region;
|
||||
}
|
||||
|
||||
host = mmc_priv(mmc);
|
||||
@@ -1000,13 +1047,13 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
||||
host->dma_timer.data = (unsigned long) host;
|
||||
|
||||
host->id = pdev->id;
|
||||
host->res = r;
|
||||
host->mem_res = res;
|
||||
host->irq = irq;
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
host->iclk = clk_get(&pdev->dev, "mmc_ick");
|
||||
if (IS_ERR(host->iclk))
|
||||
goto out;
|
||||
goto err_free_mmc_host;
|
||||
clk_enable(host->iclk);
|
||||
}
|
||||
|
||||
@@ -1017,7 +1064,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
||||
|
||||
if (IS_ERR(host->fclk)) {
|
||||
ret = PTR_ERR(host->fclk);
|
||||
goto out;
|
||||
goto err_free_iclk;
|
||||
}
|
||||
|
||||
/* REVISIT:
|
||||
@@ -1030,14 +1077,15 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
||||
host->use_dma = 1;
|
||||
host->dma_ch = -1;
|
||||
|
||||
host->irq = pdev->resource[1].start;
|
||||
host->base = (void __iomem*)IO_ADDRESS(r->start);
|
||||
host->irq = irq;
|
||||
host->phys_base = host->mem_res->start;
|
||||
host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
|
||||
|
||||
mmc->ops = &mmc_omap_ops;
|
||||
mmc->f_min = 400000;
|
||||
mmc->f_max = 24000000;
|
||||
mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
|
||||
mmc->caps = MMC_CAP_BYTEBLOCK;
|
||||
mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
|
||||
mmc->caps = MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
|
||||
|
||||
if (minfo->wire4)
|
||||
mmc->caps |= MMC_CAP_4_BIT_DATA;
|
||||
@@ -1055,20 +1103,18 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
||||
if ((ret = omap_request_gpio(host->power_pin)) != 0) {
|
||||
dev_err(mmc_dev(host->mmc),
|
||||
"Unable to get GPIO pin for MMC power\n");
|
||||
goto out;
|
||||
goto err_free_fclk;
|
||||
}
|
||||
omap_set_gpio_direction(host->power_pin, 0);
|
||||
}
|
||||
|
||||
ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
|
||||
if (ret)
|
||||
goto out;
|
||||
goto err_free_power_gpio;
|
||||
|
||||
host->dev = &pdev->dev;
|
||||
platform_set_drvdata(pdev, host);
|
||||
|
||||
mmc_add_host(mmc);
|
||||
|
||||
if (host->switch_pin >= 0) {
|
||||
INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
|
||||
init_timer(&host->switch_timer);
|
||||
@@ -1106,10 +1152,11 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
|
||||
schedule_work(&host->switch_work);
|
||||
}
|
||||
|
||||
no_switch:
|
||||
mmc_add_host(mmc);
|
||||
|
||||
return 0;
|
||||
|
||||
out:
|
||||
no_switch:
|
||||
/* FIXME: Free other resources too. */
|
||||
if (host) {
|
||||
if (host->iclk && !IS_ERR(host->iclk))
|
||||
@@ -1118,6 +1165,20 @@ out:
|
||||
clk_put(host->fclk);
|
||||
mmc_free_host(host->mmc);
|
||||
}
|
||||
err_free_power_gpio:
|
||||
if (host->power_pin >= 0)
|
||||
omap_free_gpio(host->power_pin);
|
||||
err_free_fclk:
|
||||
clk_put(host->fclk);
|
||||
err_free_iclk:
|
||||
if (host->iclk != NULL) {
|
||||
clk_disable(host->iclk);
|
||||
clk_put(host->iclk);
|
||||
}
|
||||
err_free_mmc_host:
|
||||
mmc_free_host(host->mmc);
|
||||
err_free_mem_region:
|
||||
release_mem_region(res->start, res->end - res->start + 1);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -1127,30 +1188,31 @@ static int mmc_omap_remove(struct platform_device *pdev)
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
if (host) {
|
||||
mmc_remove_host(host->mmc);
|
||||
free_irq(host->irq, host);
|
||||
BUG_ON(host == NULL);
|
||||
|
||||
if (host->power_pin >= 0)
|
||||
omap_free_gpio(host->power_pin);
|
||||
if (host->switch_pin >= 0) {
|
||||
device_remove_file(&pdev->dev, &dev_attr_enable_poll);
|
||||
device_remove_file(&pdev->dev, &dev_attr_cover_switch);
|
||||
free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
|
||||
omap_free_gpio(host->switch_pin);
|
||||
host->switch_pin = -1;
|
||||
del_timer_sync(&host->switch_timer);
|
||||
flush_scheduled_work();
|
||||
}
|
||||
if (host->iclk && !IS_ERR(host->iclk))
|
||||
clk_put(host->iclk);
|
||||
if (host->fclk && !IS_ERR(host->fclk))
|
||||
clk_put(host->fclk);
|
||||
mmc_free_host(host->mmc);
|
||||
mmc_remove_host(host->mmc);
|
||||
free_irq(host->irq, host);
|
||||
|
||||
if (host->power_pin >= 0)
|
||||
omap_free_gpio(host->power_pin);
|
||||
if (host->switch_pin >= 0) {
|
||||
device_remove_file(&pdev->dev, &dev_attr_enable_poll);
|
||||
device_remove_file(&pdev->dev, &dev_attr_cover_switch);
|
||||
free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
|
||||
omap_free_gpio(host->switch_pin);
|
||||
host->switch_pin = -1;
|
||||
del_timer_sync(&host->switch_timer);
|
||||
flush_scheduled_work();
|
||||
}
|
||||
if (host->iclk && !IS_ERR(host->iclk))
|
||||
clk_put(host->iclk);
|
||||
if (host->fclk && !IS_ERR(host->fclk))
|
||||
clk_put(host->fclk);
|
||||
|
||||
release_mem_region(pdev->resource[0].start,
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1);
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1);
|
||||
|
||||
mmc_free_host(host->mmc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
Reference in New Issue
Block a user