Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6:
  sh: Fix dreamcast build for IRQ changes.
  sh: Fix clock multiplier on SH7722.
  sh: Wire up kdump crash kernel exec in die().
  sh: sr.bl toggling around idle sleep.
  sh: disable genrtc support.
  fs: Kill sh dependency for binfmt_flat.
  sh: Disable psw support for R7785RP.
  sh: Fix page size alignment in __copy_user_page().
  sh: Fix up various compile warnings for SE boards.
  sh: Wire up signalfd/timerfd/eventfd syscalls.
  sh: revert addition of page fault notifiers
  spelling fixes: arch/sh/
  input: hp680_ts compile fixes.
  sh: landisk: Header cleanups.
  sh: landisk: rtc-rs5c313 support.
  sh: Kill off pmb slab cache destructor.
  sh: Fix up psw build rules for r7780rp.
  sh: Shut up compiler warnings in __do_page_fault().
This commit is contained in:
Linus Torvalds
2007-05-22 17:26:18 -07:00
39 changed files with 165 additions and 186 deletions

View File

@@ -31,7 +31,7 @@
*/
#if defined(CONFIG_CPU_SH4)
/* SH4 can't access PCMCIA interface through P2 area.
* we must remap it with appropreate attribute bit of the page set.
* we must remap it with appropriate attribute bit of the page set.
* this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
#if defined(CONFIG_CF_AREA6)

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@@ -278,6 +278,11 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
{
}
void __init __attribute__ ((weak))
arch_clk_init(void)
{
}
static int show_clocks(char *buf, char **start, off_t off,
int len, int *eof, void *data)
{
@@ -314,6 +319,8 @@ int __init clk_init(void)
ret |= clk_register(clk);
}
arch_clk_init();
/* Kick the child clocks.. */
propagate_rate(&master_clk);
propagate_rate(&bus_clk);

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@@ -38,7 +38,7 @@ static struct hw_interrupt_type maskreg_irq_type = {
.end = end_maskreg_irq
};
/* actual implementatin */
/* actual implementation */
static unsigned int startup_maskreg_irq(unsigned int irq)
{
enable_maskreg_irq(irq);

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@@ -138,7 +138,7 @@ restore_fpu(struct task_struct *tsk)
/*
* Load the FPU with signalling NANS. This bit pattern we're using
* has the property that no matter wether considered as single or as
* double precission represents signaling NANS.
* double precision represents signaling NANS.
*/
static void

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@@ -106,6 +106,7 @@ static struct ipr_data sh7750_ipr_map[] = {
{ 38, 2, 8, 7 }, /* DMAC DMAE */
};
#ifdef CONFIG_CPU_SUBTYPE_SH7751
static struct ipr_data sh7751_ipr_map[] = {
{ 44, 2, 8, 7 }, /* DMAC DMTE4 */
{ 45, 2, 8, 7 }, /* DMAC DMTE5 */
@@ -117,6 +118,7 @@ static struct ipr_data sh7751_ipr_map[] = {
/*{ 72, INTPRI00, 8, ? },*/ /* TMU3 TUNI */
/*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
};
#endif
static unsigned long ipr_offsets[] = {
0xffd00004UL, /* 0: IPRA */

View File

@@ -17,7 +17,6 @@
#include <asm/clock.h>
#include <asm/freq.h>
#define SH7722_PLL_FREQ (32000000/8)
#define N (-1)
#define NM (-2)
#define ROUND_NEAREST 0
@@ -141,28 +140,36 @@ static void adjust_clocks(int originate, int *l, unsigned long v[],
*/
static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
static void master_clk_init(struct clk *clk)
static void master_clk_recalc(struct clk *clk)
{
clk_set_rate(clk, clk_get_rate(clk));
unsigned frqcr = ctrl_inl(FRQCR);
clk->rate = CONFIG_SH_PCLK_FREQ * (((frqcr >> 24) & 0x1f) + 1);
}
static void master_clk_recalc(struct clk *clk)
static void master_clk_init(struct clk *clk)
{
clk->parent = NULL;
clk->flags |= CLK_RATE_PROPAGATES;
clk->rate = CONFIG_SH_PCLK_FREQ;
master_clk_recalc(clk);
}
static void module_clk_recalc(struct clk *clk)
{
unsigned long frqcr = ctrl_inl(FRQCR);
clk->rate = CONFIG_SH_PCLK_FREQ * (1 + (frqcr >> 24 & 0xF));
clk->rate = clk->parent->rate / (((frqcr >> 24) & 0x1f) + 1);
}
static int master_clk_setrate(struct clk *clk, unsigned long rate, int id)
{
int div = rate / SH7722_PLL_FREQ;
int div = rate / clk->rate;
int master_divs[] = { 2, 3, 4, 6, 8, 16 };
int index;
unsigned long frqcr;
if (rate < SH7722_PLL_FREQ * 2)
return -EINVAL;
for (index = 1; index < ARRAY_SIZE(master_divs); index++)
if (div >= master_divs[index - 1] && div < master_divs[index])
break;
@@ -185,6 +192,10 @@ static struct clk_ops sh7722_master_clk_ops = {
.set_rate = master_clk_setrate,
};
static struct clk_ops sh7722_module_clk_ops = {
.recalc = module_clk_recalc,
};
struct frqcr_context {
unsigned mask;
unsigned shift;
@@ -489,7 +500,7 @@ static void sh7722_siu_recalc(struct clk *clk)
if (siu < 0)
return /* siu */ ;
BUG_ON(siu > 1);
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
}
@@ -571,7 +582,7 @@ static struct clk *sh7722_clocks[] = {
*/
struct clk_ops *onchip_ops[] = {
&sh7722_master_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_module_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_frqcr_clk_ops,
};
@@ -583,7 +594,7 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
*ops = onchip_ops[type];
}
int __init sh7722_clock_init(void)
int __init arch_clk_init(void)
{
struct clk *master;
int i;
@@ -597,4 +608,3 @@ int __init sh7722_clock_init(void)
clk_put(master);
return 0;
}
arch_initcall(sh7722_clock_init);

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@@ -2,7 +2,7 @@
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Containes extracts from code by Glenn Engel, Jim Kingdon,
* Contains extracts from code by Glenn Engel, Jim Kingdon,
* David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
* Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>,
* Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
@@ -85,7 +85,7 @@
*
* Responses can be run-length encoded to save space. A '*' means that
* the next character is an ASCII encoding giving a repeat count which
* stands for that many repititions of the character preceding the '*'.
* stands for that many repetitions of the character preceding the '*'.
* The encoding is n+29, yielding a printable character where n >=3
* (which is where RLE starts to win). Don't use an n > 126.
*

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@@ -26,8 +26,6 @@
static int hlt_counter;
int ubc_usercnt = 0;
#define HARD_IDLE_TIMEOUT (HZ / 3)
void (*pm_idle)(void);
void (*pm_power_off)(void);
EXPORT_SYMBOL(pm_power_off);
@@ -44,16 +42,39 @@ void enable_hlt(void)
}
EXPORT_SYMBOL(enable_hlt);
static int __init nohlt_setup(char *__unused)
{
hlt_counter = 1;
return 1;
}
__setup("nohlt", nohlt_setup);
static int __init hlt_setup(char *__unused)
{
hlt_counter = 0;
return 1;
}
__setup("hlt", hlt_setup);
void default_idle(void)
{
if (!hlt_counter)
cpu_sleep();
else
cpu_relax();
if (!hlt_counter) {
clear_thread_flag(TIF_POLLING_NRFLAG);
smp_mb__after_clear_bit();
set_bl_bit();
while (!need_resched())
cpu_sleep();
clear_bl_bit();
set_thread_flag(TIF_POLLING_NRFLAG);
} else
while (!need_resched())
cpu_relax();
}
void cpu_idle(void)
{
set_thread_flag(TIF_POLLING_NRFLAG);
/* endless idle loop with no priority at all */
while (1) {
void (*idle)(void) = pm_idle;

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@@ -355,3 +355,6 @@ ENTRY(sys_call_table)
.long sys_getcpu
.long sys_epoll_pwait
.long sys_utimensat /* 320 */
.long sys_signalfd
.long sys_timerfd
.long sys_eventfd

View File

@@ -21,6 +21,7 @@
#include <linux/bug.h>
#include <linux/debug_locks.h>
#include <linux/kdebug.h>
#include <linux/kexec.h>
#include <linux/limits.h>
#include <asm/system.h>
#include <asm/uaccess.h>
@@ -101,6 +102,16 @@ void die(const char * str, struct pt_regs * regs, long err)
bust_spinlocks(0);
spin_unlock_irq(&die_lock);
if (kexec_should_crash(current))
crash_kexec(regs);
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
do_exit(SIGSEGV);
}
@@ -513,7 +524,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
* misaligned data access
* access to >= 0x80000000 is user mode
* Unfortuntaly we can't distinguish between instruction address error
* and data address errors caused by read acceses.
* and data address errors caused by read accesses.
*/
asmlinkage void do_address_error(struct pt_regs *regs,
unsigned long writeaccess,