Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: sh: Fix dreamcast build for IRQ changes. sh: Fix clock multiplier on SH7722. sh: Wire up kdump crash kernel exec in die(). sh: sr.bl toggling around idle sleep. sh: disable genrtc support. fs: Kill sh dependency for binfmt_flat. sh: Disable psw support for R7785RP. sh: Fix page size alignment in __copy_user_page(). sh: Fix up various compile warnings for SE boards. sh: Wire up signalfd/timerfd/eventfd syscalls. sh: revert addition of page fault notifiers spelling fixes: arch/sh/ input: hp680_ts compile fixes. sh: landisk: Header cleanups. sh: landisk: rtc-rs5c313 support. sh: Kill off pmb slab cache destructor. sh: Fix up psw build rules for r7780rp. sh: Shut up compiler warnings in __do_page_fault().
This commit is contained in:
@@ -31,7 +31,7 @@
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*/
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#if defined(CONFIG_CPU_SH4)
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/* SH4 can't access PCMCIA interface through P2 area.
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* we must remap it with appropreate attribute bit of the page set.
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* we must remap it with appropriate attribute bit of the page set.
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* this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
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#if defined(CONFIG_CF_AREA6)
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@@ -278,6 +278,11 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
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{
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}
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void __init __attribute__ ((weak))
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arch_clk_init(void)
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{
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}
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static int show_clocks(char *buf, char **start, off_t off,
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int len, int *eof, void *data)
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{
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@@ -314,6 +319,8 @@ int __init clk_init(void)
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ret |= clk_register(clk);
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}
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arch_clk_init();
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/* Kick the child clocks.. */
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propagate_rate(&master_clk);
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propagate_rate(&bus_clk);
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@@ -38,7 +38,7 @@ static struct hw_interrupt_type maskreg_irq_type = {
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.end = end_maskreg_irq
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};
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/* actual implementatin */
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/* actual implementation */
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static unsigned int startup_maskreg_irq(unsigned int irq)
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{
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enable_maskreg_irq(irq);
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@@ -138,7 +138,7 @@ restore_fpu(struct task_struct *tsk)
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/*
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* Load the FPU with signalling NANS. This bit pattern we're using
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* has the property that no matter wether considered as single or as
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* double precission represents signaling NANS.
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* double precision represents signaling NANS.
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*/
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static void
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@@ -106,6 +106,7 @@ static struct ipr_data sh7750_ipr_map[] = {
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{ 38, 2, 8, 7 }, /* DMAC DMAE */
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};
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#ifdef CONFIG_CPU_SUBTYPE_SH7751
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static struct ipr_data sh7751_ipr_map[] = {
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{ 44, 2, 8, 7 }, /* DMAC DMTE4 */
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{ 45, 2, 8, 7 }, /* DMAC DMTE5 */
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@@ -117,6 +118,7 @@ static struct ipr_data sh7751_ipr_map[] = {
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/*{ 72, INTPRI00, 8, ? },*/ /* TMU3 TUNI */
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/*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
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};
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#endif
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static unsigned long ipr_offsets[] = {
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0xffd00004UL, /* 0: IPRA */
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@@ -17,7 +17,6 @@
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#include <asm/clock.h>
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#include <asm/freq.h>
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#define SH7722_PLL_FREQ (32000000/8)
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#define N (-1)
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#define NM (-2)
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#define ROUND_NEAREST 0
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@@ -141,28 +140,36 @@ static void adjust_clocks(int originate, int *l, unsigned long v[],
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*/
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static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
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static void master_clk_init(struct clk *clk)
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static void master_clk_recalc(struct clk *clk)
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{
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clk_set_rate(clk, clk_get_rate(clk));
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unsigned frqcr = ctrl_inl(FRQCR);
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clk->rate = CONFIG_SH_PCLK_FREQ * (((frqcr >> 24) & 0x1f) + 1);
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}
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static void master_clk_recalc(struct clk *clk)
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static void master_clk_init(struct clk *clk)
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{
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clk->parent = NULL;
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clk->flags |= CLK_RATE_PROPAGATES;
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clk->rate = CONFIG_SH_PCLK_FREQ;
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master_clk_recalc(clk);
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}
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static void module_clk_recalc(struct clk *clk)
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{
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unsigned long frqcr = ctrl_inl(FRQCR);
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clk->rate = CONFIG_SH_PCLK_FREQ * (1 + (frqcr >> 24 & 0xF));
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clk->rate = clk->parent->rate / (((frqcr >> 24) & 0x1f) + 1);
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}
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static int master_clk_setrate(struct clk *clk, unsigned long rate, int id)
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{
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int div = rate / SH7722_PLL_FREQ;
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int div = rate / clk->rate;
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int master_divs[] = { 2, 3, 4, 6, 8, 16 };
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int index;
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unsigned long frqcr;
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if (rate < SH7722_PLL_FREQ * 2)
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return -EINVAL;
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for (index = 1; index < ARRAY_SIZE(master_divs); index++)
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if (div >= master_divs[index - 1] && div < master_divs[index])
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break;
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@@ -185,6 +192,10 @@ static struct clk_ops sh7722_master_clk_ops = {
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.set_rate = master_clk_setrate,
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};
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static struct clk_ops sh7722_module_clk_ops = {
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.recalc = module_clk_recalc,
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};
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struct frqcr_context {
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unsigned mask;
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unsigned shift;
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@@ -489,7 +500,7 @@ static void sh7722_siu_recalc(struct clk *clk)
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if (siu < 0)
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return /* siu */ ;
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BUG_ON(siu > 1);
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BUG_ON(siu > 2);
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r = ctrl_inl(sh7722_siu_regs[siu]);
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clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
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}
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@@ -571,7 +582,7 @@ static struct clk *sh7722_clocks[] = {
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*/
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struct clk_ops *onchip_ops[] = {
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&sh7722_master_clk_ops,
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&sh7722_frqcr_clk_ops,
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&sh7722_module_clk_ops,
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&sh7722_frqcr_clk_ops,
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&sh7722_frqcr_clk_ops,
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};
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@@ -583,7 +594,7 @@ arch_init_clk_ops(struct clk_ops **ops, int type)
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*ops = onchip_ops[type];
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}
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int __init sh7722_clock_init(void)
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int __init arch_clk_init(void)
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{
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struct clk *master;
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int i;
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@@ -597,4 +608,3 @@ int __init sh7722_clock_init(void)
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clk_put(master);
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return 0;
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}
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arch_initcall(sh7722_clock_init);
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@@ -2,7 +2,7 @@
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* May be copied or modified under the terms of the GNU General Public
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* License. See linux/COPYING for more information.
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*
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* Containes extracts from code by Glenn Engel, Jim Kingdon,
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* Contains extracts from code by Glenn Engel, Jim Kingdon,
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* David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
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* Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>,
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* Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
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@@ -85,7 +85,7 @@
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*
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* Responses can be run-length encoded to save space. A '*' means that
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* the next character is an ASCII encoding giving a repeat count which
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* stands for that many repititions of the character preceding the '*'.
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* stands for that many repetitions of the character preceding the '*'.
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* The encoding is n+29, yielding a printable character where n >=3
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* (which is where RLE starts to win). Don't use an n > 126.
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*
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@@ -26,8 +26,6 @@
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static int hlt_counter;
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int ubc_usercnt = 0;
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#define HARD_IDLE_TIMEOUT (HZ / 3)
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void (*pm_idle)(void);
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void (*pm_power_off)(void);
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EXPORT_SYMBOL(pm_power_off);
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@@ -44,16 +42,39 @@ void enable_hlt(void)
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}
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EXPORT_SYMBOL(enable_hlt);
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static int __init nohlt_setup(char *__unused)
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{
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hlt_counter = 1;
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return 1;
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}
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__setup("nohlt", nohlt_setup);
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static int __init hlt_setup(char *__unused)
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{
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hlt_counter = 0;
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return 1;
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}
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__setup("hlt", hlt_setup);
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void default_idle(void)
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{
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if (!hlt_counter)
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cpu_sleep();
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else
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cpu_relax();
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if (!hlt_counter) {
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clear_thread_flag(TIF_POLLING_NRFLAG);
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smp_mb__after_clear_bit();
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set_bl_bit();
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while (!need_resched())
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cpu_sleep();
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clear_bl_bit();
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set_thread_flag(TIF_POLLING_NRFLAG);
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} else
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while (!need_resched())
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cpu_relax();
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}
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void cpu_idle(void)
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{
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set_thread_flag(TIF_POLLING_NRFLAG);
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/* endless idle loop with no priority at all */
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while (1) {
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void (*idle)(void) = pm_idle;
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@@ -355,3 +355,6 @@ ENTRY(sys_call_table)
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.long sys_getcpu
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.long sys_epoll_pwait
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.long sys_utimensat /* 320 */
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.long sys_signalfd
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.long sys_timerfd
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.long sys_eventfd
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@@ -21,6 +21,7 @@
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#include <linux/bug.h>
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#include <linux/debug_locks.h>
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#include <linux/kdebug.h>
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#include <linux/kexec.h>
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#include <linux/limits.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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@@ -101,6 +102,16 @@ void die(const char * str, struct pt_regs * regs, long err)
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bust_spinlocks(0);
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spin_unlock_irq(&die_lock);
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if (kexec_should_crash(current))
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crash_kexec(regs);
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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do_exit(SIGSEGV);
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}
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@@ -513,7 +524,7 @@ static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
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* misaligned data access
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* access to >= 0x80000000 is user mode
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* Unfortuntaly we can't distinguish between instruction address error
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* and data address errors caused by read acceses.
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* and data address errors caused by read accesses.
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*/
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asmlinkage void do_address_error(struct pt_regs *regs,
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unsigned long writeaccess,
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