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drm/amdgpu: sriov restrict max_pfn below AMDGPU_GMC_HOLE

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sriov need to restrict max_pfn below AMDGPU_GMC_HOLE.
access the hole results in a range fault interrupt IIRC.

Signed-off-by: Wentao Lou <Wentao.Lou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
wentalou 2019-01-24 11:24:59 +08:00 committed by Alex Deucher
parent 06ea4c3499
commit cdba61daf5
2 changed files with 6 additions and 3 deletions
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3
drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
View File

@ -26,8 +26,7 @@
uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
{
uint64_t addr = min(adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT,
AMDGPU_GMC_HOLE_START);
uint64_t addr = adev->vm_manager.max_pfn << AMDGPU_GPU_PAGE_SHIFT;
addr -= AMDGPU_VA_RESERVED_SIZE;
addr = amdgpu_gmc_sign_extend(addr);

6
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
View File

@ -965,7 +965,11 @@ static int gmc_v9_0_sw_init(void *handle)
* vm size is 256TB (48bit), maximum size of Vega10,
* block size 512 (9bit)
*/
amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
/* sriov restrict max_pfn below AMDGPU_GMC_HOLE */
if (amdgpu_sriov_vf(adev))
amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 47);
else
amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
break;
default:
break;