powerpc: Add VSX context save/restore, ptrace and signal support
This patch extends the floating point save and restore code to use the VSX load/stores when VSX is available. This will make FP context save/restore marginally slower on FP only code, when VSX is available, as it has to load/store 128bits rather than just 64bits. Mixing FP, VMX and VSX code will get constant architected state. The signals interface is extended to enable access to VSR 0-31 doubleword 1 after discussions with tool chain maintainers. Backward compatibility is maintained. The ptrace interface is also extended to allow access to VSR 0-31 full registers. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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committed by
Paul Mackerras
parent
72ffff5b17
commit
ce48b21007
@ -53,6 +53,7 @@ extern unsigned long _get_SP(void);
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#ifndef CONFIG_SMP
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struct task_struct *last_task_used_math = NULL;
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struct task_struct *last_task_used_altivec = NULL;
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struct task_struct *last_task_used_vsx = NULL;
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struct task_struct *last_task_used_spe = NULL;
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#endif
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@ -106,11 +107,23 @@ EXPORT_SYMBOL(enable_kernel_fp);
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int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
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{
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#ifdef CONFIG_VSX
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int i;
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elf_fpreg_t *reg;
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#endif
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if (!tsk->thread.regs)
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return 0;
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flush_fp_to_thread(current);
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#ifdef CONFIG_VSX
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reg = (elf_fpreg_t *)fpregs;
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for (i = 0; i < ELF_NFPREG - 1; i++, reg++)
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*reg = tsk->thread.TS_FPR(i);
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memcpy(reg, &tsk->thread.fpscr, sizeof(elf_fpreg_t));
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#else
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memcpy(fpregs, &tsk->thread.TS_FPR(0), sizeof(*fpregs));
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#endif
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return 1;
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}
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@ -149,7 +162,7 @@ void flush_altivec_to_thread(struct task_struct *tsk)
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}
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}
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int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
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int dump_task_altivec(struct task_struct *tsk, elf_vrreg_t *vrregs)
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{
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/* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
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* separately, see below */
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@ -179,6 +192,80 @@ int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
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}
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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#if 0
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/* not currently used, but some crazy RAID module might want to later */
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void enable_kernel_vsx(void)
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{
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WARN_ON(preemptible());
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#ifdef CONFIG_SMP
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if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
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giveup_vsx(current);
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else
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giveup_vsx(NULL); /* just enable vsx for kernel - force */
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#else
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giveup_vsx(last_task_used_vsx);
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#endif /* CONFIG_SMP */
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}
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EXPORT_SYMBOL(enable_kernel_vsx);
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#endif
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void flush_vsx_to_thread(struct task_struct *tsk)
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{
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if (tsk->thread.regs) {
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preempt_disable();
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if (tsk->thread.regs->msr & MSR_VSX) {
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#ifdef CONFIG_SMP
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BUG_ON(tsk != current);
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#endif
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giveup_vsx(tsk);
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}
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preempt_enable();
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}
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}
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/*
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* This dumps the lower half 64bits of the first 32 VSX registers.
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* This needs to be called with dump_task_fp and dump_task_altivec to
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* get all the VSX state.
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*/
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int dump_task_vsx(struct task_struct *tsk, elf_vrreg_t *vrregs)
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{
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elf_vrreg_t *reg;
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double buf[32];
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int i;
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if (tsk == current)
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flush_vsx_to_thread(tsk);
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reg = (elf_vrreg_t *)vrregs;
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for (i = 0; i < 32 ; i++)
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buf[i] = current->thread.fpr[i][TS_VSRLOWOFFSET];
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memcpy(reg, buf, sizeof(buf));
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return 1;
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}
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#endif /* CONFIG_VSX */
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int dump_task_vector(struct task_struct *tsk, elf_vrregset_t *vrregs)
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{
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int rc = 0;
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elf_vrreg_t *regs = (elf_vrreg_t *)vrregs;
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#ifdef CONFIG_ALTIVEC
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rc = dump_task_altivec(tsk, regs);
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if (rc)
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return rc;
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regs += ELF_NVRREG;
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#endif
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#ifdef CONFIG_VSX
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rc = dump_task_vsx(tsk, regs);
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#endif
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return rc;
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}
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#ifdef CONFIG_SPE
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void enable_kernel_spe(void)
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@ -233,6 +320,10 @@ void discard_lazy_cpu_state(void)
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if (last_task_used_altivec == current)
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last_task_used_altivec = NULL;
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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if (last_task_used_vsx == current)
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last_task_used_vsx = NULL;
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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if (last_task_used_spe == current)
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last_task_used_spe = NULL;
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@ -297,6 +388,10 @@ struct task_struct *__switch_to(struct task_struct *prev,
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if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
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giveup_altivec(prev);
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
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giveup_vsx(prev);
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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/*
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* If the previous thread used spe in the last quantum
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@ -317,6 +412,10 @@ struct task_struct *__switch_to(struct task_struct *prev,
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if (new->thread.regs && last_task_used_altivec == new)
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new->thread.regs->msr |= MSR_VEC;
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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if (new->thread.regs && last_task_used_vsx == new)
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new->thread.regs->msr |= MSR_VSX;
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_SPE
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/* Avoid the trap. On smp this this never happens since
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* we don't set last_task_used_spe
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@ -417,6 +516,8 @@ static struct regbit {
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{MSR_EE, "EE"},
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{MSR_PR, "PR"},
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{MSR_FP, "FP"},
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{MSR_VEC, "VEC"},
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{MSR_VSX, "VSX"},
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{MSR_ME, "ME"},
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{MSR_IR, "IR"},
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{MSR_DR, "DR"},
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@ -534,6 +635,7 @@ void prepare_to_copy(struct task_struct *tsk)
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{
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flush_fp_to_thread(current);
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flush_altivec_to_thread(current);
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flush_vsx_to_thread(current);
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flush_spe_to_thread(current);
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}
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@ -689,6 +791,9 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
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#endif
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discard_lazy_cpu_state();
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#ifdef CONFIG_VSX
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current->thread.used_vsr = 0;
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#endif
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memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
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current->thread.fpscr.val = 0;
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#ifdef CONFIG_ALTIVEC
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