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[MIPS] BCM1480: Fix PCI/HT IO access

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- removed check for enable HT-PCI bridges, because some CFE version
  init only the needed one and scanning works even with disabled HT
  links
- implemented I/O access behind HT PCI busses
- fixed pci_map for IO resource behind PCI bridge

Tested with E100 and Tulip driver.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Thomas Bogendoerfer
2008-03-16 18:14:16 +01:00
committed by Ralf Baechle
parent 447cdf2628
commit cf7b7e0b37
2 changed files with 11 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/mips/pci/pci-bcm1480.c
View File

@@ -185,8 +185,8 @@ static struct resource bcm1480_mem_resource = {
static struct resource bcm1480_io_resource = { static struct resource bcm1480_io_resource = {
.name = "BCM1480 PCI I/O", .name = "BCM1480 PCI I/O",
.start = 0x2c000000UL, .start = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES,
.end = 0x2dffffffUL, .end = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES + 0x1ffffffUL,
.flags = IORESOURCE_IO, .flags = IORESOURCE_IO,
}; };
@@ -194,6 +194,7 @@ struct pci_controller bcm1480_controller = {
.pci_ops = &bcm1480_pci_ops, .pci_ops = &bcm1480_pci_ops,
.mem_resource = &bcm1480_mem_resource, .mem_resource = &bcm1480_mem_resource,
.io_resource = &bcm1480_io_resource, .io_resource = &bcm1480_io_resource,
.io_offset = A_BCM1480_PHYS_PCI_IO_MATCH_BYTES,
}; };
@@ -251,6 +252,7 @@ static int __init bcm1480_pcibios_init(void)
bcm1480_controller.io_map_base = (unsigned long) bcm1480_controller.io_map_base = (unsigned long)
ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536); ioremap(A_BCM1480_PHYS_PCI_IO_MATCH_BYTES, 65536);
bcm1480_controller.io_map_base -= bcm1480_controller.io_offset;
set_io_port_base(bcm1480_controller.io_map_base); set_io_port_base(bcm1480_controller.io_map_base);
isa_slot_offset = (unsigned long) isa_slot_offset = (unsigned long)
ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024); ioremap(A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES, 1024*1024);

21
arch/mips/pci/pci-bcm1480ht.c
View File

@@ -180,8 +180,8 @@ static struct resource bcm1480ht_mem_resource = {
static struct resource bcm1480ht_io_resource = { static struct resource bcm1480ht_io_resource = {
.name = "BCM1480 HT I/O", .name = "BCM1480 HT I/O",
.start = 0x00000000UL, .start = A_BCM1480_PHYS_HT_IO_MATCH_BYTES,
.end = 0x01ffffffUL, .end = A_BCM1480_PHYS_HT_IO_MATCH_BYTES + 0x01ffffffUL,
.flags = IORESOURCE_IO, .flags = IORESOURCE_IO,
}; };
@@ -191,29 +191,22 @@ struct pci_controller bcm1480ht_controller = {
.io_resource = &bcm1480ht_io_resource, .io_resource = &bcm1480ht_io_resource,
.index = 1, .index = 1,
.get_busno = bcm1480ht_pcibios_get_busno, .get_busno = bcm1480ht_pcibios_get_busno,
.io_offset = A_BCM1480_PHYS_HT_IO_MATCH_BYTES,
}; };
static int __init bcm1480ht_pcibios_init(void) static int __init bcm1480ht_pcibios_init(void)
{ {
uint32_t cmdreg;
ht_cfg_space = ioremap(A_BCM1480_PHYS_HT_CFG_MATCH_BITS, 16*1024*1024); ht_cfg_space = ioremap(A_BCM1480_PHYS_HT_CFG_MATCH_BITS, 16*1024*1024);
/* /* CFE doesn't always init all HT paths, so we always scan */
* See if the PCI bus has been configured by the firmware.
*/
cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0),
PCI_COMMAND));
if (!(cmdreg & PCI_COMMAND_MASTER)) {
printk("HT: Skipping HT probe. Bus is not initialized.\n");
iounmap(ht_cfg_space);
return 1; /* XXX */
}
bcm1480ht_bus_status |= PCI_BUS_ENABLED; bcm1480ht_bus_status |= PCI_BUS_ENABLED;
ht_eoi_space = (unsigned long) ht_eoi_space = (unsigned long)
ioremap(A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES, ioremap(A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES,
4 * 1024 * 1024); 4 * 1024 * 1024);
bcm1480ht_controller.io_map_base = (unsigned long)
ioremap(A_BCM1480_PHYS_HT_IO_MATCH_BYTES, 65536);
bcm1480ht_controller.io_map_base -= bcm1480ht_controller.io_offset;
register_pci_controller(&bcm1480ht_controller); register_pci_controller(&bcm1480ht_controller);