irqchip/stm32: Use a platform driver for stm32mp1-exti device
This irqchip driver uses the hwspinlock framework (coprocessor HW regs access concurrency) for the stm32mp1-exti device. Hence, this driver needs to handle the hwspinlock driver dependency using the deferred probe mechanism which requires to move this driver into a platform one with a probe() ops. This applies only for the device which is "st,stm32mp1-exti" compatible, the management of the other devices (st,stm32h7-exti / st,stm32-exti) is kept unchanged (use IRQCHIP_DECLARE) Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
This commit is contained in:
Fabien Dessenne
Marc Zyngier
parent
960164f714
commit
cfbf9e4970
@ -14,8 +14,10 @@
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/syscore_ops.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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@ -37,12 +39,6 @@ struct stm32_exti_bank {
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#define UNDEF_REG ~0
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enum stm32_exti_hwspinlock {
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HWSPINLOCK_UNKNOWN,
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HWSPINLOCK_NONE,
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HWSPINLOCK_READY,
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};
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struct stm32_desc_irq {
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u32 exti;
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u32 irq_parent;
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@ -69,8 +65,6 @@ struct stm32_exti_host_data {
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void __iomem *base;
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struct stm32_exti_chip_data *chips_data;
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const struct stm32_exti_drv_data *drv_data;
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struct device_node *node;
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enum stm32_exti_hwspinlock hwlock_state;
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struct hwspinlock *hwlock;
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};
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@ -285,49 +279,27 @@ static int stm32_exti_set_type(struct irq_data *d,
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static int stm32_exti_hwspin_lock(struct stm32_exti_chip_data *chip_data)
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{
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struct stm32_exti_host_data *host_data = chip_data->host_data;
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struct hwspinlock *hwlock;
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int id, ret = 0, timeout = 0;
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int ret, timeout = 0;
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/* first time, check for hwspinlock availability */
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if (unlikely(host_data->hwlock_state == HWSPINLOCK_UNKNOWN)) {
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id = of_hwspin_lock_get_id(host_data->node, 0);
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if (id >= 0) {
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hwlock = hwspin_lock_request_specific(id);
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if (hwlock) {
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/* found valid hwspinlock */
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host_data->hwlock_state = HWSPINLOCK_READY;
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host_data->hwlock = hwlock;
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pr_debug("%s hwspinlock = %d\n", __func__, id);
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} else {
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host_data->hwlock_state = HWSPINLOCK_NONE;
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}
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} else if (id != -EPROBE_DEFER) {
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host_data->hwlock_state = HWSPINLOCK_NONE;
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} else {
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/* hwspinlock driver shall be ready at that stage */
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ret = -EPROBE_DEFER;
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}
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}
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if (!chip_data->host_data->hwlock)
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return 0;
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if (likely(host_data->hwlock_state == HWSPINLOCK_READY)) {
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/*
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* Use the x_raw API since we are under spin_lock protection.
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* Do not use the x_timeout API because we are under irq_disable
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* mode (see __setup_irq())
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*/
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do {
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ret = hwspin_trylock_raw(host_data->hwlock);
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if (!ret)
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return 0;
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/*
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* Use the x_raw API since we are under spin_lock protection.
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* Do not use the x_timeout API because we are under irq_disable
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* mode (see __setup_irq())
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*/
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do {
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ret = hwspin_trylock_raw(chip_data->host_data->hwlock);
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if (!ret)
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return 0;
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udelay(HWSPNLCK_RETRY_DELAY);
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timeout += HWSPNLCK_RETRY_DELAY;
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} while (timeout < HWSPNLCK_TIMEOUT);
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udelay(HWSPNLCK_RETRY_DELAY);
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timeout += HWSPNLCK_RETRY_DELAY;
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} while (timeout < HWSPNLCK_TIMEOUT);
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if (ret == -EBUSY)
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ret = -ETIMEDOUT;
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}
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if (ret == -EBUSY)
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ret = -ETIMEDOUT;
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if (ret)
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pr_err("%s can't get hwspinlock (%d)\n", __func__, ret);
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@ -337,7 +309,7 @@ static int stm32_exti_hwspin_lock(struct stm32_exti_chip_data *chip_data)
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static void stm32_exti_hwspin_unlock(struct stm32_exti_chip_data *chip_data)
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{
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if (likely(chip_data->host_data->hwlock_state == HWSPINLOCK_READY))
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if (chip_data->host_data->hwlock)
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hwspin_unlock_raw(chip_data->host_data->hwlock);
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}
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@ -586,8 +558,7 @@ static int stm32_exti_h_set_affinity(struct irq_data *d,
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return -EINVAL;
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}
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#ifdef CONFIG_PM
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static int stm32_exti_h_suspend(void)
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static int __maybe_unused stm32_exti_h_suspend(void)
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{
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struct stm32_exti_chip_data *chip_data;
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int i;
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@ -602,7 +573,7 @@ static int stm32_exti_h_suspend(void)
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return 0;
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}
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static void stm32_exti_h_resume(void)
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static void __maybe_unused stm32_exti_h_resume(void)
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{
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struct stm32_exti_chip_data *chip_data;
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int i;
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@ -616,17 +587,22 @@ static void stm32_exti_h_resume(void)
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}
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static struct syscore_ops stm32_exti_h_syscore_ops = {
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#ifdef CONFIG_PM_SLEEP
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.suspend = stm32_exti_h_suspend,
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.resume = stm32_exti_h_resume,
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#endif
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};
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static void stm32_exti_h_syscore_init(void)
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static void stm32_exti_h_syscore_init(struct stm32_exti_host_data *host_data)
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{
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stm32_host_data = host_data;
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register_syscore_ops(&stm32_exti_h_syscore_ops);
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}
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#else
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static inline void stm32_exti_h_syscore_init(void) {}
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#endif
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static void stm32_exti_h_syscore_deinit(void)
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{
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unregister_syscore_ops(&stm32_exti_h_syscore_ops);
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}
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static struct irq_chip stm32_exti_h_chip = {
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.name = "stm32-exti-h",
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@ -683,8 +659,6 @@ stm32_exti_host_data *stm32_exti_host_init(const struct stm32_exti_drv_data *dd,
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return NULL;
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host_data->drv_data = dd;
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host_data->node = node;
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host_data->hwlock_state = HWSPINLOCK_UNKNOWN;
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host_data->chips_data = kcalloc(dd->bank_nr,
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sizeof(struct stm32_exti_chip_data),
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GFP_KERNEL);
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@ -711,7 +685,8 @@ stm32_exti_host_data *stm32_exti_host_init(const struct stm32_exti_drv_data *dd,
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static struct
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stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
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u32 bank_idx)
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u32 bank_idx,
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struct device_node *node)
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{
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const struct stm32_exti_bank *stm32_bank;
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struct stm32_exti_chip_data *chip_data;
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@ -731,7 +706,7 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
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writel_relaxed(0, base + stm32_bank->imr_ofst);
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writel_relaxed(0, base + stm32_bank->emr_ofst);
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pr_info("%pOF: bank%d\n", h_data->node, bank_idx);
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pr_info("%pOF: bank%d\n", node, bank_idx);
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return chip_data;
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}
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@ -771,7 +746,7 @@ static int __init stm32_exti_init(const struct stm32_exti_drv_data *drv_data,
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struct stm32_exti_chip_data *chip_data;
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stm32_bank = drv_data->exti_banks[i];
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chip_data = stm32_exti_chip_init(host_data, i);
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chip_data = stm32_exti_chip_init(host_data, i, node);
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gc = irq_get_domain_generic_chip(domain, i * IRQS_PER_BANK);
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@ -815,50 +790,130 @@ static const struct irq_domain_ops stm32_exti_h_domain_ops = {
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.xlate = irq_domain_xlate_twocell,
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};
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static int
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__init stm32_exti_hierarchy_init(const struct stm32_exti_drv_data *drv_data,
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struct device_node *node,
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struct device_node *parent)
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static void stm32_exti_remove_irq(void *data)
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{
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struct irq_domain *domain = data;
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irq_domain_remove(domain);
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}
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static int stm32_exti_remove(struct platform_device *pdev)
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{
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stm32_exti_h_syscore_deinit();
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return 0;
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}
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static int stm32_exti_probe(struct platform_device *pdev)
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{
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int ret, i;
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct irq_domain *parent_domain, *domain;
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struct stm32_exti_host_data *host_data;
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int ret, i;
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const struct stm32_exti_drv_data *drv_data;
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struct resource *res;
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parent_domain = irq_find_host(parent);
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if (!parent_domain) {
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pr_err("interrupt-parent not found\n");
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return -EINVAL;
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}
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host_data = stm32_exti_host_init(drv_data, node);
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host_data = devm_kzalloc(dev, sizeof(*host_data), GFP_KERNEL);
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if (!host_data)
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return -ENOMEM;
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/* check for optional hwspinlock which may be not available yet */
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ret = of_hwspin_lock_get_id(np, 0);
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if (ret == -EPROBE_DEFER)
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/* hwspinlock framework not yet ready */
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return ret;
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if (ret >= 0) {
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host_data->hwlock = devm_hwspin_lock_request_specific(dev, ret);
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if (!host_data->hwlock) {
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dev_err(dev, "Failed to request hwspinlock\n");
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return -EINVAL;
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}
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} else if (ret != -ENOENT) {
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/* note: ENOENT is a valid case (means 'no hwspinlock') */
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dev_err(dev, "Failed to get hwspinlock\n");
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return ret;
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}
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/* initialize host_data */
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drv_data = of_device_get_match_data(dev);
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if (!drv_data) {
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dev_err(dev, "no of match data\n");
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return -ENODEV;
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}
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host_data->drv_data = drv_data;
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host_data->chips_data = devm_kcalloc(dev, drv_data->bank_nr,
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sizeof(*host_data->chips_data),
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GFP_KERNEL);
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if (!host_data->chips_data)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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host_data->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(host_data->base)) {
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dev_err(dev, "Unable to map registers\n");
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return PTR_ERR(host_data->base);
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}
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for (i = 0; i < drv_data->bank_nr; i++)
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stm32_exti_chip_init(host_data, i);
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stm32_exti_chip_init(host_data, i, np);
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parent_domain = irq_find_host(of_irq_find_parent(np));
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if (!parent_domain) {
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dev_err(dev, "GIC interrupt-parent not found\n");
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return -EINVAL;
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}
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domain = irq_domain_add_hierarchy(parent_domain, 0,
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drv_data->bank_nr * IRQS_PER_BANK,
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node, &stm32_exti_h_domain_ops,
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np, &stm32_exti_h_domain_ops,
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host_data);
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if (!domain) {
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pr_err("%pOFn: Could not register exti domain.\n", node);
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ret = -ENOMEM;
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goto out_unmap;
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dev_err(dev, "Could not register exti domain\n");
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return -ENOMEM;
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}
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stm32_exti_h_syscore_init();
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ret = devm_add_action_or_reset(dev, stm32_exti_remove_irq, domain);
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if (ret)
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return ret;
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stm32_exti_h_syscore_init(host_data);
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return 0;
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out_unmap:
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iounmap(host_data->base);
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kfree(host_data->chips_data);
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kfree(host_data);
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return ret;
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}
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/* platform driver only for MP1 */
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static const struct of_device_id stm32_exti_ids[] = {
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{ .compatible = "st,stm32mp1-exti", .data = &stm32mp1_drv_data},
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{},
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};
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MODULE_DEVICE_TABLE(of, stm32_exti_ids);
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static struct platform_driver stm32_exti_driver = {
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.probe = stm32_exti_probe,
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.remove = stm32_exti_remove,
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.driver = {
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.name = "stm32_exti",
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.of_match_table = stm32_exti_ids,
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},
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};
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static int __init stm32_exti_arch_init(void)
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{
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return platform_driver_register(&stm32_exti_driver);
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}
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static void __exit stm32_exti_arch_exit(void)
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{
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return platform_driver_unregister(&stm32_exti_driver);
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}
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arch_initcall(stm32_exti_arch_init);
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module_exit(stm32_exti_arch_exit);
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/* no platform driver for F4 and H7 */
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static int __init stm32f4_exti_of_init(struct device_node *np,
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struct device_node *parent)
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{
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@ -874,11 +929,3 @@ static int __init stm32h7_exti_of_init(struct device_node *np,
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}
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IRQCHIP_DECLARE(stm32h7_exti, "st,stm32h7-exti", stm32h7_exti_of_init);
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static int __init stm32mp1_exti_of_init(struct device_node *np,
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struct device_node *parent)
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{
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return stm32_exti_hierarchy_init(&stm32mp1_drv_data, np, parent);
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}
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IRQCHIP_DECLARE(stm32mp1_exti, "st,stm32mp1-exti", stm32mp1_exti_of_init);
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