[POWERPC] Cell fixup DMA offset for new southbridge
This patch makes the Cell DMA code work on both the Spider and the Axon south bridges by turning cell_dma_valid into a variable instead of a constant. This is a temporary patch until we have full iommu support. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
committed by
Paul Mackerras
parent
4c9d2800be
commit
d03f387eb3
@@ -46,6 +46,8 @@
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#include "iommu.h"
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#include "iommu.h"
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static dma_addr_t cell_dma_valid = SPIDER_DMA_VALID;
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static inline unsigned long
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static inline unsigned long
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get_iopt_entry(unsigned long real_address, unsigned long ioid,
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get_iopt_entry(unsigned long real_address, unsigned long ioid,
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unsigned long prot)
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unsigned long prot)
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@@ -423,7 +425,7 @@ static void *cell_alloc_coherent(struct device *hwdev, size_t size,
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ret = (void *)__get_free_pages(flag, get_order(size));
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ret = (void *)__get_free_pages(flag, get_order(size));
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if (ret != NULL) {
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if (ret != NULL) {
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memset(ret, 0, size);
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memset(ret, 0, size);
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*dma_handle = virt_to_abs(ret) | CELL_DMA_VALID;
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*dma_handle = virt_to_abs(ret) | cell_dma_valid;
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}
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}
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return ret;
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return ret;
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}
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}
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@@ -437,7 +439,7 @@ static void cell_free_coherent(struct device *hwdev, size_t size,
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static dma_addr_t cell_map_single(struct device *hwdev, void *ptr,
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static dma_addr_t cell_map_single(struct device *hwdev, void *ptr,
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size_t size, enum dma_data_direction direction)
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size_t size, enum dma_data_direction direction)
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{
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{
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return virt_to_abs(ptr) | CELL_DMA_VALID;
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return virt_to_abs(ptr) | cell_dma_valid;
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}
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}
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static void cell_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
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static void cell_unmap_single(struct device *hwdev, dma_addr_t dma_addr,
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@@ -452,7 +454,7 @@ static int cell_map_sg(struct device *hwdev, struct scatterlist *sg,
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for (i = 0; i < nents; i++, sg++) {
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for (i = 0; i < nents; i++, sg++) {
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sg->dma_address = (page_to_phys(sg->page) + sg->offset)
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sg->dma_address = (page_to_phys(sg->page) + sg->offset)
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| CELL_DMA_VALID;
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| cell_dma_valid;
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sg->dma_length = sg->length;
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sg->dma_length = sg->length;
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}
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}
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@@ -483,6 +485,12 @@ void cell_init_iommu(void)
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{
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{
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int setup_bus = 0;
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int setup_bus = 0;
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/* If we have an Axon bridge, clear the DMA valid mask. This is fairly
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* hackish but will work well enough until we have proper iommu code.
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*/
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if (of_find_node_by_name(NULL, "axon"))
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cell_dma_valid = 0;
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if (of_find_node_by_path("/mambo")) {
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if (of_find_node_by_path("/mambo")) {
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pr_info("Not using iommu on systemsim\n");
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pr_info("Not using iommu on systemsim\n");
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} else {
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} else {
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@@ -53,9 +53,11 @@ enum {
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IOC_ST_ORIGIN = 0x918,
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IOC_ST_ORIGIN = 0x918,
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IOC_CONF = 0x930,
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IOC_CONF = 0x930,
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/* The high bit needs to be set on every DMA address,
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/* The high bit needs to be set on every DMA address when using
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only 2GB are addressable */
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* a spider bridge and only 2GB are addressable with the current
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CELL_DMA_VALID = 0x80000000,
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* iommu code.
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*/
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SPIDER_DMA_VALID = 0x80000000,
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CELL_DMA_MASK = 0x7fffffff,
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CELL_DMA_MASK = 0x7fffffff,
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};
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};
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