[IA64] Sanitize assembler code for ia64_sal_os_state
struct ia64_sal_os_state has three semi-independent sections. The code in mca_asm.S assumes that these three sections are contiguous, which makes it very awkward to add new data to this structure. Remove the assumption that the sections are contiguous. Define a macro to shorten references to offsets in ia64_sal_os_state. This patch does not change the way that the code behaves. It just makes it easier to update the code in future and to add fields to ia64_sal_os_state when debugging the MCA/INIT handlers. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -159,7 +159,7 @@ ia64_os_mca_spin:
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GET_IA64_MCA_DATA(r2)
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// Using MCA stack, struct ia64_sal_os_state, variable proc_state_param
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;;
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add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET, r2
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add r3=IA64_MCA_CPU_MCA_STACK_OFFSET+MCA_SOS_OFFSET+SOS(PROC_STATE_PARAM), r2
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;;
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ld8 r18=[r3] // Get processor state parameter on existing PALE_CHECK.
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;;
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@ -479,9 +479,11 @@ ia64_state_save:
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st8 [temp2]=r11,16 // rv_rc
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mov r11=cr.iipa
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;;
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st8 [temp1]=r18,16 // proc_state_param
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st8 [temp2]=r19,16 // monarch
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st8 [temp1]=r18 // proc_state_param
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st8 [temp2]=r19 // monarch
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mov r6=IA64_KR(CURRENT)
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add temp1=SOS(SAL_RA), regs
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add temp2=SOS(SAL_GP), regs
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;;
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st8 [temp1]=r12,16 // sal_ra
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st8 [temp2]=r10,16 // sal_gp
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@ -503,12 +505,14 @@ ia64_state_save:
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st8 [temp2]=r11,16 // cr.iipa
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mov r12=cr.iim
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;;
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st8 [temp1]=r12,16 // cr.iim
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st8 [temp1]=r12 // cr.iim
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(p1) mov r12=IA64_MCA_COLD_BOOT
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(p2) mov r12=IA64_INIT_WARM_BOOT
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mov r6=cr.iha
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add temp1=SOS(OS_STATUS), regs
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;;
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st8 [temp2]=r6,16 // cr.iha
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st8 [temp2]=r6 // cr.iha
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add temp2=SOS(CONTEXT), regs
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st8 [temp1]=r12 // os_status, default is cold boot
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mov r6=IA64_MCA_SAME_CONTEXT
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;;
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@ -820,8 +824,8 @@ ia64_state_restore:
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// Restore the SAL to OS state. The previous code left regs at pt_regs.
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add regs=MCA_SOS_OFFSET-MCA_PT_REGS_OFFSET, regs
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;;
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add temp1=IA64_SAL_OS_STATE_COMMON_OFFSET, regs
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add temp2=IA64_SAL_OS_STATE_COMMON_OFFSET+8, regs
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add temp1=SOS(SAL_RA), regs
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add temp2=SOS(SAL_GP), regs
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;;
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ld8 r12=[temp1],16 // sal_ra
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ld8 r9=[temp2],16 // sal_gp
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@ -842,8 +846,10 @@ ia64_state_restore:
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;;
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mov cr.itir=temp3
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mov cr.iipa=temp4
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ld8 temp3=[temp1],16 // cr.iim
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ld8 temp4=[temp2],16 // cr.iha
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ld8 temp3=[temp1] // cr.iim
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ld8 temp4=[temp2] // cr.iha
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add temp1=SOS(OS_STATUS), regs
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add temp2=SOS(CONTEXT), regs
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;;
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mov cr.iim=temp3
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mov cr.iha=temp4
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@ -916,7 +922,7 @@ ia64_state_restore:
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ia64_new_stack:
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add regs=MCA_PT_REGS_OFFSET, r3
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add temp2=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET, r3
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add temp2=MCA_SOS_OFFSET+SOS(PAL_MIN_STATE), r3
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mov b0=r2 // save return address
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GET_IA64_MCA_DATA(temp1)
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invala
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@ -1020,7 +1026,7 @@ ia64_old_stack:
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ia64_set_kernel_registers:
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add temp3=MCA_SP_OFFSET, r3
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add temp4=MCA_SOS_OFFSET+IA64_SAL_OS_STATE_OS_GP_OFFSET, r3
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add temp4=MCA_SOS_OFFSET+SOS(OS_GP), r3
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mov b0=r2 // save return address
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GET_IA64_MCA_DATA(temp1)
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;;
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