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Merge branch 'drm-fixes-3.11' of git://people.freedesktop.org/~agd5f/linux

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Just two small fixes for radeon.  One fixes an array overrun
that can cause garbage to get written to registers on some r7xx boards,
the other is a small UVD fix.
Also one audio regresion

* 'drm-fixes-3.11' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: fix WREG32_OR macro setting bits in a register
  drm/radeon/r7xx: fix copy paste typo in golden register setup
  drm/radeon: fix UVD message buffer validation
This commit is contained in:
Dave Airlie
2013-08-19 12:55:50 +10:00
parent e42f581421 d43a93c8d9
commit d2b2c08456
3 changed files with 15 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/radeon/radeon.h
View File

@@ -2163,7 +2163,7 @@ void cik_mm_wdoorbell(struct radeon_device *rdev, u32 offset, u32 v);
WREG32(reg, tmp_); \ WREG32(reg, tmp_); \
} while (0) } while (0)
#define WREG32_AND(reg, and) WREG32_P(reg, 0, and) #define WREG32_AND(reg, and) WREG32_P(reg, 0, and)
#define WREG32_OR(reg, or) WREG32_P(reg, or, ~or) #define WREG32_OR(reg, or) WREG32_P(reg, or, ~(or))
#define WREG32_PLL_P(reg, val, mask) \ #define WREG32_PLL_P(reg, val, mask) \
do { \ do { \
uint32_t tmp_ = RREG32_PLL(reg); \ uint32_t tmp_ = RREG32_PLL(reg); \

8
drivers/gpu/drm/radeon/radeon_uvd.c
View File

@@ -356,6 +356,14 @@ static int radeon_uvd_cs_msg(struct radeon_cs_parser *p, struct radeon_bo *bo,
return -EINVAL; return -EINVAL;
} }
if (bo->tbo.sync_obj) {
r = radeon_fence_wait(bo->tbo.sync_obj, false);
if (r) {
DRM_ERROR("Failed waiting for UVD message (%d)!\n", r);
return r;
}
}
r = radeon_bo_kmap(bo, &ptr); r = radeon_bo_kmap(bo, &ptr);
if (r) { if (r) {
DRM_ERROR("Failed mapping the UVD message (%d)!\n", r); DRM_ERROR("Failed mapping the UVD message (%d)!\n", r);

12
drivers/gpu/drm/radeon/rv770.c
View File

@@ -744,10 +744,10 @@ static void rv770_init_golden_registers(struct radeon_device *rdev)
(const u32)ARRAY_SIZE(r7xx_golden_dyn_gpr_registers)); (const u32)ARRAY_SIZE(r7xx_golden_dyn_gpr_registers));
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv730_golden_registers, rv730_golden_registers,
(const u32)ARRAY_SIZE(rv770_golden_registers)); (const u32)ARRAY_SIZE(rv730_golden_registers));
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv730_mgcg_init, rv730_mgcg_init,
(const u32)ARRAY_SIZE(rv770_mgcg_init)); (const u32)ARRAY_SIZE(rv730_mgcg_init));
break; break;
case CHIP_RV710: case CHIP_RV710:
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
@@ -758,18 +758,18 @@ static void rv770_init_golden_registers(struct radeon_device *rdev)
(const u32)ARRAY_SIZE(r7xx_golden_dyn_gpr_registers)); (const u32)ARRAY_SIZE(r7xx_golden_dyn_gpr_registers));
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv710_golden_registers, rv710_golden_registers,
(const u32)ARRAY_SIZE(rv770_golden_registers)); (const u32)ARRAY_SIZE(rv710_golden_registers));
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv710_mgcg_init, rv710_mgcg_init,
(const u32)ARRAY_SIZE(rv770_mgcg_init)); (const u32)ARRAY_SIZE(rv710_mgcg_init));
break; break;
case CHIP_RV740: case CHIP_RV740:
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv740_golden_registers, rv740_golden_registers,
(const u32)ARRAY_SIZE(rv770_golden_registers)); (const u32)ARRAY_SIZE(rv740_golden_registers));
radeon_program_register_sequence(rdev, radeon_program_register_sequence(rdev,
rv740_mgcg_init, rv740_mgcg_init,
(const u32)ARRAY_SIZE(rv770_mgcg_init)); (const u32)ARRAY_SIZE(rv740_mgcg_init));
break; break;
default: default:
break; break;