perf, x86: Reorder intel_pmu_enable_all()
The documentation says we have to enable PEBS before we enable the PMU proper. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar
parent
2df202bf75
commit
d329527e47
@@ -487,6 +487,8 @@ static void intel_pmu_enable_all(void)
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{
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{
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
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intel_pmu_pebs_enable_all();
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intel_pmu_lbr_enable_all();
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wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
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wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
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if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
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if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {
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@@ -498,9 +500,6 @@ static void intel_pmu_enable_all(void)
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intel_pmu_enable_bts(event->hw.config);
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intel_pmu_enable_bts(event->hw.config);
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}
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}
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intel_pmu_pebs_enable_all();
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intel_pmu_lbr_enable_all();
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}
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}
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static inline u64 intel_pmu_get_status(void)
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static inline u64 intel_pmu_get_status(void)
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