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[MIPS] SB1250: Interrupt handler fixes

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Mask cp0.status against cp0.cause.  Additionally, spurious interrupts are
not recorded.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Maciej W. Rozycki
2006-10-03 12:42:02 +01:00
committed by Ralf Baechle
parent af8b128719
commit d599def5cd
1 changed files with 5 additions and 2 deletions
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7
arch/mips/sibyte/sb1250/irq.c
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@@ -442,7 +442,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
* blasting the high 32 bits. * blasting the high 32 bits.
*/ */
pending = read_c0_cause(); pending = read_c0_cause() & read_c0_status();
#ifdef CONFIG_SIBYTE_SB1250_PROF #ifdef CONFIG_SIBYTE_SB1250_PROF
if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */
@@ -476,5 +476,8 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
R_IMR_INTERRUPT_STATUS_BASE))); R_IMR_INTERRUPT_STATUS_BASE)));
if (mask) if (mask)
do_IRQ(fls64(mask) - 1, regs); do_IRQ(fls64(mask) - 1, regs);
} else
spurious_interrupt(regs);
} else
spurious_interrupt(regs);
} }