Merge tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6

Pull PA-RISC fixes from James Bottomley:
 "This is a set of three bug fixes that gets parisc running again on
  systems with PA1.1 processors.

  Two fix regressions introduced in 2.6.39 and one fixes a prefetch bug
  that only affects PA7300LC processors.  We also have another pending
  fix to do with the sectional arrangement of vmlinux.lds, but there's a
  query on it during testing on one particular system type, so I'll hold
  off sending it in for now."

* tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6:
  [PARISC] fix panic on prefetch(NULL) on PA7300LC
  [PARISC] fix crash in flush_icache_page_asm on PA1.1
  [PARISC] fix PA1.1 oops on boot

arch/parisc/include/asm/prefetch.h

@@ -21,7 +21,12 @@
 #define ARCH_HAS_PREFETCH
 static inline void prefetch(const void *addr)
 {
-	__asm__("ldw 0(%0), %%r0" : : "r" (addr));
+	__asm__(
+#ifndef CONFIG_PA20
+		/* Need to avoid prefetch of NULL on PA7300LC */
+		"	extrw,u,= %0,31,32,%%r0\n"
+#endif
+		"	ldw 0(%0), %%r0" : : "r" (addr));
 }
 
 /* LDD is a PA2.0 addition. */

arch/parisc/kernel/entry.S

@@ -581,7 +581,11 @@
 	 */
 	cmpiclr,=	0x01,\tmp,%r0
 	ldi		(_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
+#ifdef CONFIG_64BIT
 	depd,z		\prot,8,7,\prot
+#else
+	depw,z		\prot,8,7,\prot
+#endif
 	/*
 	 * OK, it is in the temp alias region, check whether "from" or "to".
 	 * Check "subtle" note in pacache.S re: r23/r26.

arch/parisc/kernel/pacache.S

@@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)
 
 	/* Purge any old translation */
 
-	pitlb		(%sr0,%r28)
+	pitlb		(%sr4,%r28)
 
 	ldil		L%icache_stride, %r1
 	ldw		R%icache_stride(%r1), %r1
@@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)
 	sub		%r25, %r1, %r25
 
 
-1:      fic,m		%r1(%r28)
+	/* fic only has the type 26 form on PA1.1, requiring an
-	fic,m		%r1(%r28)
+	 * explicit space specification, so use %sr4 */
-	fic,m		%r1(%r28)
+1:      fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
+	fic,m		%r1(%sr4,%r28)
+	fic,m		%r1(%sr4,%r28)
 	cmpb,COND(<<)		%r28, %r25,1b
-	fic,m		%r1(%r28)
+	fic,m		%r1(%sr4,%r28)
 
 	sync
 	bv		%r0(%r2)
-	pitlb		(%sr0,%r25)
+	pitlb		(%sr4,%r25)
 	.exit
 
 	.procend