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powerpc/85xx: Make sure lwarx hint isn't set on ppc32

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e500v1/v2 based chips will treat any reserved field being set in an
opcode as illegal.  Thus always setting the hint in the opcode is
a bad idea.

Anton should be kept away from the powerpc opcode map.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala
2010-03-10 23:33:25 -06:00
parent 30124d1109
commit d6ccb1f55d
1 changed files with 3 additions and 3 deletions
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6
arch/powerpc/include/asm/ppc-opcode.h
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@@ -25,7 +25,7 @@
#define PPC_INST_LDARX 0x7c0000a8 #define PPC_INST_LDARX 0x7c0000a8
#define PPC_INST_LSWI 0x7c0004aa #define PPC_INST_LSWI 0x7c0004aa
#define PPC_INST_LSWX 0x7c00042a #define PPC_INST_LSWX 0x7c00042a
#define PPC_INST_LWARX 0x7c000029 #define PPC_INST_LWARX 0x7c000028
#define PPC_INST_LWSYNC 0x7c2004ac #define PPC_INST_LWSYNC 0x7c2004ac
#define PPC_INST_LXVD2X 0x7c000698 #define PPC_INST_LXVD2X 0x7c000698
#define PPC_INST_MCRXR 0x7c000400 #define PPC_INST_MCRXR 0x7c000400
@@ -62,8 +62,8 @@
#define __PPC_T_TLB(t) (((t) & 0x3) << 21) #define __PPC_T_TLB(t) (((t) & 0x3) << 21)
#define __PPC_WC(w) (((w) & 0x3) << 21) #define __PPC_WC(w) (((w) & 0x3) << 21)
/* /*
* Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
* any side effects on all 32bit processors, we can do this all the time. * larx with EH set as an illegal instruction.
*/ */
#ifdef CONFIG_PPC64 #ifdef CONFIG_PPC64
#define __PPC_EH(eh) (((eh) & 0x1) << 0) #define __PPC_EH(eh) (((eh) & 0x1) << 0)